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authorTakashi Iwai <tiwai@suse.de>2018-03-21 10:06:13 +0100
committerTakashi Iwai <tiwai@suse.de>2018-03-21 10:23:07 +0100
commita8d7bde23e7130686b76624b099f3e22dd38aef7 (patch)
tree751302ba644ff4cbc03afae42725f8d97bc39717 /sound/pci
parentALSA: usb-audio: Fix parsing descriptor of UAC2 processing unit (diff)
downloadlinux-a8d7bde23e7130686b76624b099f3e22dd38aef7.tar.xz
linux-a8d7bde23e7130686b76624b099f3e22dd38aef7.zip
ALSA: hda - Force polling mode on CFL for fixing codec communication
We've observed too long probe time with Coffee Lake (CFL) machines, and the likely cause is some communication problem between the HD-audio controller and the codec chips. While the controller expects an IRQ wakeup for each codec response, it seems sometimes missing, and it takes one second for the controller driver to time out and read the response in the polling mode. Although we aren't sure about the real culprit yet, in this patch, we put a workaround by forcing the polling mode as default for CFL machines; the polling mode itself isn't too heavy, and much better than other workarounds initially suggested (e.g. disabling power-save), at least. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=199007 Fixes: e79b0006c45c ("ALSA: hda - Add Coffelake PCI ID") Reported-and-tested-by: Hui Wang <hui.wang@canonical.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/hda/hda_intel.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index d5017adf9feb..c507c69029e3 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -375,6 +375,7 @@ enum {
((pci)->device == 0x160c))
#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
+#define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
static char *driver_short_names[] = {
[AZX_DRIVER_ICH] = "HDA Intel",
@@ -1744,6 +1745,10 @@ static int azx_create(struct snd_card *card, struct pci_dev *pci,
else
chip->bdl_pos_adj = bdl_pos_adj[dev];
+ /* Workaround for a communication error on CFL (bko#199007) */
+ if (IS_CFL(pci))
+ chip->polling_mode = 1;
+
err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
if (err < 0) {
kfree(hda);