diff options
| author | Jonas Andersson <jonas@microbit.se> | 2009-03-04 08:24:26 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-03-04 15:47:39 +0100 |
| commit | 86027ae78c9294bb450b76eec28cfb431a8fb3ee (patch) | |
| tree | 4e2634b23e5f050f0065ad4ff2a6845409f1e532 /sound/soc/atmel | |
| parent | ASoC: Add GPIO support for jack reporting interface (diff) | |
| download | linux-86027ae78c9294bb450b76eec28cfb431a8fb3ee.tar.xz linux-86027ae78c9294bb450b76eec28cfb431a8fb3ee.zip | |
ASoC: wm8510 pll settings
When setting WM8510_MCLKDIV the pll was turned off.
When setting pll frequency you got twice the expected freq, because
the code calculated with postscaler of 8, but the hardware divide by 4.
Signed-off-by: Jonas Andersson <jonas@microbit.se>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/atmel')
| -rw-r--r-- | sound/soc/atmel/playpaq_wm8510.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/sound/soc/atmel/playpaq_wm8510.c b/sound/soc/atmel/playpaq_wm8510.c index 43dd8cee83c6..70657534e6b1 100644 --- a/sound/soc/atmel/playpaq_wm8510.c +++ b/sound/soc/atmel/playpaq_wm8510.c @@ -164,38 +164,38 @@ static int playpaq_wm8510_hw_params(struct snd_pcm_substream *substream, */ switch (params_rate(params)) { case 48000: - pll_out = 12288000; - mclk_div = WM8510_MCLKDIV_1; + pll_out = 24576000; + mclk_div = WM8510_MCLKDIV_2; bclk = WM8510_BCLKDIV_8; break; case 44100: - pll_out = 11289600; - mclk_div = WM8510_MCLKDIV_1; + pll_out = 22579200; + mclk_div = WM8510_MCLKDIV_2; bclk = WM8510_BCLKDIV_8; break; case 22050: - pll_out = 11289600; - mclk_div = WM8510_MCLKDIV_2; + pll_out = 22579200; + mclk_div = WM8510_MCLKDIV_4; bclk = WM8510_BCLKDIV_8; break; case 16000: - pll_out = 12288000; - mclk_div = WM8510_MCLKDIV_3; + pll_out = 24576000; + mclk_div = WM8510_MCLKDIV_6; bclk = WM8510_BCLKDIV_8; break; case 11025: - pll_out = 11289600; - mclk_div = WM8510_MCLKDIV_4; + pll_out = 22579200; + mclk_div = WM8510_MCLKDIV_8; bclk = WM8510_BCLKDIV_8; break; case 8000: - pll_out = 12288000; - mclk_div = WM8510_MCLKDIV_6; + pll_out = 24576000; + mclk_div = WM8510_MCLKDIV_12; bclk = WM8510_BCLKDIV_8; break; |