diff options
| author | Maarten Zanders <maarten.zanders@mind.be> | 2022-10-28 17:26:23 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-11-25 20:31:52 +0100 |
| commit | 27b6fa6145215c5f49d93e322a16144b928ecd3e (patch) | |
| tree | 823efc3fb1c444b598b88b8b06a600181429b2e3 /sound/soc/codecs/adau1372.c | |
| parent | Linux 6.1-rc5 (diff) | |
| download | linux-27b6fa6145215c5f49d93e322a16144b928ecd3e.tar.xz linux-27b6fa6145215c5f49d93e322a16144b928ecd3e.zip | |
ASoC: adau1372: fix mclk
"mclk" is retrieved from the configuration and assigned to adau1372->clk.
However adau1372->mclk (==NULL) is used for clk_prepare_enable() and
clk_disable_unprepare() which don't have any effect.
Remove .clk from struct adau1372 and use .mclk throughout.
This change ensures that the input clock is switched on/off when the
bias level is changed.
Signed-off-by: Maarten Zanders <maarten.zanders@mind.be>
Link: https://lore.kernel.org/r/20221028152626.109603-2-maarten.zanders@mind.be
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/adau1372.c')
| -rw-r--r-- | sound/soc/codecs/adau1372.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/sound/soc/codecs/adau1372.c b/sound/soc/codecs/adau1372.c index a9f89e8565ec..00d0825e193b 100644 --- a/sound/soc/codecs/adau1372.c +++ b/sound/soc/codecs/adau1372.c @@ -25,7 +25,6 @@ #include "adau-utils.h" struct adau1372 { - struct clk *clk; struct regmap *regmap; void (*switch_mode)(struct device *dev); bool use_pll; @@ -925,9 +924,9 @@ int adau1372_probe(struct device *dev, struct regmap *regmap, if (!adau1372) return -ENOMEM; - adau1372->clk = devm_clk_get(dev, "mclk"); - if (IS_ERR(adau1372->clk)) - return PTR_ERR(adau1372->clk); + adau1372->mclk = devm_clk_get(dev, "mclk"); + if (IS_ERR(adau1372->mclk)) + return PTR_ERR(adau1372->mclk); adau1372->pd_gpio = devm_gpiod_get_optional(dev, "powerdown", GPIOD_OUT_HIGH); if (IS_ERR(adau1372->pd_gpio)) @@ -947,7 +946,7 @@ int adau1372_probe(struct device *dev, struct regmap *regmap, * 12.288MHz. Automatically choose a valid configuration from the * external clock. */ - rate = clk_get_rate(adau1372->clk); + rate = clk_get_rate(adau1372->mclk); switch (rate) { case 12288000: |