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authorRichard Fitzgerald <rf@opensource.cirrus.com>2021-10-15 15:36:15 +0200
committerMark Brown <broonie@kernel.org>2021-10-15 17:14:19 +0200
commit4ae1d8f911d6fc20baefd5eb061bf6964fa22a32 (patch)
treeadbd339865ca92dbb92bc0ed78cc5bb667f3e82a /sound/soc/codecs/cs42l42.h
parentASoC: cs42l42: Use PLL for SCLK > 12.288MHz (diff)
downloadlinux-4ae1d8f911d6fc20baefd5eb061bf6964fa22a32.tar.xz
linux-4ae1d8f911d6fc20baefd5eb061bf6964fa22a32.zip
ASoC: cs42l42: Allow time for HP/ADC to power-up after enable
After enabling the HP or ADC by writing the corresponding PDN=0, it takes around 20 milliseconds for it to power up and the midrail supply to be stable. Add this wait into a DAPM widget callback. If HP and ADC are both powering up in a DAPM sequence, there's no need to do the wait twice. The widget will perform one wait in the POST_PMU if there was a PRE_PMU for one or both. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20211015133619.4698-13-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/cs42l42.h')
-rw-r--r--sound/soc/codecs/cs42l42.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h
index 8734f6828f3e..ded61af6ea8b 100644
--- a/sound/soc/codecs/cs42l42.h
+++ b/sound/soc/codecs/cs42l42.h
@@ -761,6 +761,7 @@
#define CS42L42_CLOCK_SWITCH_DELAY_US 150
#define CS42L42_PLL_LOCK_POLL_US 250
#define CS42L42_PLL_LOCK_TIMEOUT_US 1250
+#define CS42L42_HP_ADC_EN_TIME_US 20000
static const char *const cs42l42_supply_names[CS42L42_NUM_SUPPLIES] = {
"VA",
@@ -794,6 +795,7 @@ struct cs42l42_private {
u8 hs_bias_ramp_time;
u8 hs_bias_sense_en;
u8 stream_use;
+ bool hp_adc_up_pending;
};
#endif /* __CS42L42_H__ */