diff options
| author | Charles Keepax <ckeepax@opensource.cirrus.com> | 2019-12-30 15:35:16 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-12-31 01:21:36 +0100 |
| commit | 1094af1199007976370b8f04b4d6668ad9707954 (patch) | |
| tree | 3ef914574fa464834d69eab621a448f053a0b355 /sound/soc/codecs/cs47l90.c | |
| parent | ASoC: cs47l92: Simplify error handling code in 'cs47l92_probe()' (diff) | |
| download | linux-1094af1199007976370b8f04b4d6668ad9707954.tar.xz linux-1094af1199007976370b8f04b4d6668ad9707954.zip | |
ASoC: madera: Enable clocks for input pins when used as a direct clock
When one of the MCLK pins is used to supply an internal clock directly
enable the source clock for that pin.
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20191230143517.21005-1-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/cs47l90.c')
| -rw-r--r-- | sound/soc/codecs/cs47l90.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/sound/soc/codecs/cs47l90.c b/sound/soc/codecs/cs47l90.c index 67cac60a859d..c3b6f4d41005 100644 --- a/sound/soc/codecs/cs47l90.c +++ b/sound/soc/codecs/cs47l90.c @@ -744,15 +744,18 @@ static const struct snd_kcontrol_new cs47l90_output_anc_src[] = { static const struct snd_soc_dapm_widget cs47l90_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("SYSCLK", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT, 0, madera_sysclk_ev, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_SUPPLY("ASYNCCLK", MADERA_ASYNC_CLOCK_1, - MADERA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0), + MADERA_ASYNC_CLK_ENA_SHIFT, 0, madera_clk_ev, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_SUPPLY("OPCLK", MADERA_OUTPUT_SYSTEM_CLOCK, MADERA_OPCLK_ENA_SHIFT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ASYNCOPCLK", MADERA_OUTPUT_ASYNC_CLOCK, MADERA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0), -SND_SOC_DAPM_SUPPLY("DSPCLK", MADERA_DSP_CLOCK_1, - MADERA_DSP_CLK_ENA_SHIFT, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("DSPCLK", MADERA_DSP_CLOCK_1, MADERA_DSP_CLK_ENA_SHIFT, + 0, madera_clk_ev, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD2", 0, 0), SND_SOC_DAPM_REGULATOR_SUPPLY("DBVDD3", 0, 0), |