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authorCodrin Ciubotariu <codrin.ciubotariu@microchip.com>2019-02-18 17:10:32 +0100
committerMark Brown <broonie@kernel.org>2019-02-18 18:41:16 +0100
commit90f6e68031397fb6212bef5619193cd15707fa0f (patch)
tree819824fabbdf3b11bcf9277e7bbd5cb9309005a6 /sound/soc/codecs/msm8916-wcd-analog.c
parentASoC: codecs: ad193x: Set constraint to always have 32 sample bits (diff)
downloadlinux-90f6e68031397fb6212bef5619193cd15707fa0f.tar.xz
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ASoC: codecs: ad193x: Fix frame polarity for DSP_A format
By default, the codec starts to interpret the left (first) channel on the falling edge (low polarity) of LRCLK. However, for DSP_A, the left channel needs to start on the rising edge of LRCLK. This patch fixes this channel swap by toggling the bit which selects the LRCLK polarity. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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