diff options
| author | Peter Rosin <peda@axentia.se> | 2015-01-28 15:16:11 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-01-28 20:28:53 +0100 |
| commit | 7c4e1119a99c5a54d38d67a66070c081fda52634 (patch) | |
| tree | 35d455861e9298ddae3e78140c8e9cb872419921 /sound/soc/codecs/pcm512x.h | |
| parent | ASoC: pcm512x: Support mastering BCLK/LRCLK using the PLL (diff) | |
| download | linux-7c4e1119a99c5a54d38d67a66070c081fda52634.tar.xz linux-7c4e1119a99c5a54d38d67a66070c081fda52634.zip | |
ASoC: pcm512x: Avoid the PLL for the DAC clock, if possible
The PLL introduces jitter, which in turn introduces noice if used
to clock the DAC. Thus, avoid the PLL output, and use the PLL input
to drive the DAC clock, if possible.
This is described for the PCM5142/PCM5242 chips in the answers to the
forum post "PCM5142/PCM5242 DAC clock source" at the TI E2E community
pages (1).
(1) http://e2e.ti.com/support/data_converters/audio_converters/f/64/t/389994
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/pcm512x.h')
| -rw-r--r-- | sound/soc/codecs/pcm512x.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sound/soc/codecs/pcm512x.h b/sound/soc/codecs/pcm512x.h index eba5adc2cdb1..b7c310207223 100644 --- a/sound/soc/codecs/pcm512x.h +++ b/sound/soc/codecs/pcm512x.h @@ -38,6 +38,7 @@ #define PCM512x_MASTER_MODE (PCM512x_PAGE_BASE(0) + 12) #define PCM512x_PLL_REF (PCM512x_PAGE_BASE(0) + 13) #define PCM512x_DAC_REF (PCM512x_PAGE_BASE(0) + 14) +#define PCM512x_GPIO_DACIN (PCM512x_PAGE_BASE(0) + 16) #define PCM512x_GPIO_PLLIN (PCM512x_PAGE_BASE(0) + 18) #define PCM512x_SYNCHRONIZE (PCM512x_PAGE_BASE(0) + 19) #define PCM512x_PLL_COEFF_0 (PCM512x_PAGE_BASE(0) + 20) @@ -162,8 +163,9 @@ #define PCM512x_SDAC_PLL (1 << 4) #define PCM512x_SDAC_SCK (3 << 4) #define PCM512x_SDAC_BCK (4 << 4) +#define PCM512x_SDAC_GPIO (5 << 4) -/* Page 0, Register 18 - GPIO source for PLL */ +/* Page 0, Register 16, 18 - GPIO source for DAC, PLL */ #define PCM512x_GREF (7 << 0) #define PCM512x_GREF_SHIFT 0 #define PCM512x_GREF_GPIO1 (0 << 0) |