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authorBen Zhang <benzh@chromium.org>2019-11-06 02:13:31 +0100
committerMark Brown <broonie@kernel.org>2019-11-11 14:02:03 +0100
commit3f81068dc8e5fc0d3b0d67a5ae99c5140a4e96cb (patch)
tree09831ffbcb0a5297ca13d5f78f7a37284a186db1 /sound/soc/codecs/rt5677.c
parentASoC: rt5677: Mark reg RT5677_PWR_ANLG2 as volatile (diff)
downloadlinux-3f81068dc8e5fc0d3b0d67a5ae99c5140a4e96cb.tar.xz
linux-3f81068dc8e5fc0d3b0d67a5ae99c5140a4e96cb.zip
ASoC: rt5677: Stop and restart DSP over suspend/resume
MCLK1 gets disabled at suspend and re-enabled at resume. Before MCLK1 is re-enabled, if the DSP is already on (either the DSP was left on during suspend, or the DSP is turned on early at resume), i2c register read returns garbage and corrupts the regmap cache. This patch stops the DSP before suspend and restarts it after resume with a dalay to ensure MCLK is on while loading firmware. Signed-off-by: Ben Zhang <benzh@chromium.org> Signed-off-by: Curtis Malainey <cujomalainey@chromium.org> Link: https://lore.kernel.org/r/20191106011335.223061-7-cujomalainey@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/rt5677.c')
-rw-r--r--sound/soc/codecs/rt5677.c24
1 files changed, 21 insertions, 3 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index e5db9dc60378..eb55d6b9d0c1 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -876,6 +876,7 @@ static int rt5677_load_dsp_from_file(struct rt5677_priv *rt5677)
static int rt5677_set_dsp_vad(struct snd_soc_component *component, bool on)
{
struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component);
+ rt5677->dsp_vad_en_request = on;
rt5677->dsp_vad_en = on;
if (!IS_ENABLED(CONFIG_SND_SOC_RT5677_SPI))
@@ -969,7 +970,7 @@ static int rt5677_dsp_vad_get(struct snd_kcontrol *kcontrol,
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component);
- ucontrol->value.integer.value[0] = rt5677->dsp_vad_en;
+ ucontrol->value.integer.value[0] = rt5677->dsp_vad_en_request;
return 0;
}
@@ -4636,14 +4637,15 @@ static int rt5677_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component);
+ enum snd_soc_bias_level prev_bias =
+ snd_soc_component_get_bias_level(component);
switch (level) {
case SND_SOC_BIAS_ON:
break;
case SND_SOC_BIAS_PREPARE:
- if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
- rt5677_set_dsp_vad(component, false);
+ if (prev_bias == SND_SOC_BIAS_STANDBY) {
regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,
RT5677_LDO1_SEL_MASK | RT5677_LDO2_SEL_MASK,
@@ -4667,9 +4669,25 @@ static int rt5677_set_bias_level(struct snd_soc_component *component,
break;
case SND_SOC_BIAS_STANDBY:
+ if (prev_bias == SND_SOC_BIAS_OFF &&
+ rt5677->dsp_vad_en_request) {
+ /* Re-enable the DSP if it was turned off at suspend */
+ rt5677->dsp_vad_en = true;
+ /* The delay is to wait for MCLK */
+ schedule_delayed_work(&rt5677->dsp_work,
+ msecs_to_jiffies(1000));
+ }
break;
case SND_SOC_BIAS_OFF:
+ flush_delayed_work(&rt5677->dsp_work);
+ if (rt5677->is_dsp_mode) {
+ /* Turn off the DSP before suspend */
+ rt5677->dsp_vad_en = false;
+ schedule_delayed_work(&rt5677->dsp_work, 0);
+ flush_delayed_work(&rt5677->dsp_work);
+ }
+
regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0);
regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000);
regmap_write(rt5677->regmap, RT5677_PWR_ANLG1,