summaryrefslogtreecommitdiffstats
path: root/sound/soc/codecs/rt5677.c
diff options
context:
space:
mode:
authorCurtis Malainey <cujomalainey@chromium.org>2019-11-06 02:13:36 +0100
committerMark Brown <broonie@kernel.org>2019-11-11 14:02:07 +0100
commit9da776ba7852f9b5cbfdfaa80a1dc07cda592b55 (patch)
treee1617b697854165c7bf4c82d06f006c018c8fe82 /sound/soc/codecs/rt5677.c
parentASoC: rt5677: Set ADC clock to use PLL and enable ASRC (diff)
downloadlinux-9da776ba7852f9b5cbfdfaa80a1dc07cda592b55.tar.xz
linux-9da776ba7852f9b5cbfdfaa80a1dc07cda592b55.zip
ASoC: rt5677: Wait for DSP to boot before loading firmware
Wait for hardware to startup. If we load before hardware is ready we could end up corrupting the firmware. Signed-off-by: Curtis Malainey <cujomalainey@chromium.org> Link: https://lore.kernel.org/r/20191106011335.223061-12-cujomalainey@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/rt5677.c')
-rw-r--r--sound/soc/codecs/rt5677.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 0e7773584145..f2f763b4c399 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -892,6 +892,7 @@ static void rt5677_dsp_work(struct work_struct *work)
container_of(work, struct rt5677_priv, dsp_work.work);
static bool activity;
bool enable = rt5677->dsp_vad_en;
+ int i, val;
dev_info(rt5677->component->dev, "DSP VAD: enable=%d, activity=%d\n",
@@ -913,6 +914,18 @@ static void rt5677_dsp_work(struct work_struct *work)
rt5677_set_vad_source(rt5677);
rt5677_set_dsp_mode(rt5677, true);
+#define RT5677_BOOT_RETRY 20
+ for (i = 0; i < RT5677_BOOT_RETRY; i++) {
+ regmap_read(rt5677->regmap, RT5677_PWR_DSP_ST, &val);
+ if (val == 0x3ff)
+ break;
+ udelay(500);
+ }
+ if (i == RT5677_BOOT_RETRY && val != 0x3ff) {
+ dev_err(rt5677->component->dev, "DSP Boot Timed Out!");
+ return;
+ }
+
/* Boot the firmware from IRAM instead of SRAM0. */
rt5677_dsp_mode_i2c_write_addr(rt5677, RT5677_DSP_BOOT_VECTOR,
0x0009, 0x0003);