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author | Jorge Eduardo Candelaria <jorge.candelaria@ti.com> | 2010-05-21 00:53:07 +0200 |
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committer | Liam Girdwood <lrg@slimlogic.co.uk> | 2010-05-21 11:47:25 +0200 |
commit | 44ebaa5de1f922965d8aa215a6da729341b3deb2 (patch) | |
tree | c6691f48e549ce928f4fb673cc33405221dbd725 /sound/soc/codecs/twl4030.c | |
parent | ASoC: tpa6130a2: Remove CPVSS and HPVdd supplies (diff) | |
download | linux-44ebaa5de1f922965d8aa215a6da729341b3deb2.tar.xz linux-44ebaa5de1f922965d8aa215a6da729341b3deb2.zip |
ASoC: TWL6040: Fix playback with 19.2 Mhz MCLK
When using MCLK is configured for 19.2 Mhz, clock slicer should be
enabled and HPPLL should be bypassed in clock path.
Signed-off-by: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
Signed-off-by: Margarita Olaya Cabrera <magi.olaya@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'sound/soc/codecs/twl4030.c')
0 files changed, 0 insertions, 0 deletions