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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-04-22 21:32:40 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-04-22 22:37:30 +0200 |
| commit | 4dbfe8097157fde1f8054f48f991ea45833852cd (patch) | |
| tree | e0a4e3c7e1b81febc5946b3b24f0235f9f45e13c /sound/soc/codecs/wm8903.c | |
| parent | ASoC: Support CLK_DSP in WM8903 (diff) | |
| download | linux-4dbfe8097157fde1f8054f48f991ea45833852cd.tar.xz linux-4dbfe8097157fde1f8054f48f991ea45833852cd.zip | |
ASoC: Optimise configuration of WM8903 DC servo
Modify the default startup sequence in the chip to set the DC servo
dither level for optimal performance.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/wm8903.c')
| -rw-r--r-- | sound/soc/codecs/wm8903.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index 27c8b94c0551..de0a58507202 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c @@ -978,6 +978,11 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec, wm8903_write(codec, WM8903_CLOCK_RATES_2, WM8903_CLK_SYS_ENA); + /* Change DC servo dither level in startup sequence */ + wm8903_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11); + wm8903_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257); + wm8903_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2); + wm8903_run_sequence(codec, 0); wm8903_sync_reg_cache(codec, codec->reg_cache); |