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author | Pradeep Tewani <pradeep.d.tewani@intel.com> | 2017-12-06 12:04:03 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2017-12-06 18:44:59 +0100 |
commit | 9452314d92d600e8702533b10f10ec440aad5db9 (patch) | |
tree | 434231c0629e8049e024ba9e57bc3559f1f4e9b0 /sound/soc/intel/skylake/skl-messages.c | |
parent | ASoC: Intel: Skylake: Parse vendor tokens to build A-State table (diff) | |
download | linux-9452314d92d600e8702533b10f10ec440aad5db9.tar.xz linux-9452314d92d600e8702533b10f10ec440aad5db9.zip |
ASoC: Intel: Skylake: Configure DSP clock source
DSP clock source is configured by sending the A-State table to the FW.
Add the large config set IPC to configure the desired clock source
Signed-off-by: Pradeep Tewani <pradeep.d.tewani@intel.com>
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel/skylake/skl-messages.c')
-rw-r--r-- | sound/soc/intel/skylake/skl-messages.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/sound/soc/intel/skylake/skl-messages.c b/sound/soc/intel/skylake/skl-messages.c index f637829833e6..4e63213a8d55 100644 --- a/sound/soc/intel/skylake/skl-messages.c +++ b/sound/soc/intel/skylake/skl-messages.c @@ -55,6 +55,19 @@ static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab) return 0; } +#define SKL_ASTATE_PARAM_ID 4 + +void skl_dsp_set_astate_cfg(struct skl_sst *ctx, u32 cnt, void *data) +{ + struct skl_ipc_large_config_msg msg = {0}; + + msg.large_param_id = SKL_ASTATE_PARAM_ID; + msg.param_data_size = (cnt * sizeof(struct skl_astate_param) + + sizeof(cnt)); + + skl_ipc_set_large_config(&ctx->ipc, &msg, data); +} + #define NOTIFICATION_PARAM_ID 3 #define NOTIFICATION_MASK 0xf @@ -409,6 +422,11 @@ int skl_resume_dsp(struct skl *skl) return ret; skl_dsp_enable_notification(skl->skl_sst, false); + + if (skl->cfg.astate_cfg != NULL) { + skl_dsp_set_astate_cfg(skl->skl_sst, skl->cfg.astate_cfg->count, + skl->cfg.astate_cfg); + } return ret; } |