diff options
| author | Padmavathi Venna <padma.v@samsung.com> | 2013-07-26 15:36:48 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-07-26 17:05:33 +0200 |
| commit | b60be4aa40cff1ebfffc09f92b9007ac1fa24fb4 (patch) | |
| tree | 8f7349909d072429f2070b917cedfc0a46d4b8fd /sound/soc/samsung/i2s-regs.h | |
| parent | ASoC: samsung-spdif: Convert to devm_clk_get() (diff) | |
| download | linux-b60be4aa40cff1ebfffc09f92b9007ac1fa24fb4.tar.xz linux-b60be4aa40cff1ebfffc09f92b9007ac1fa24fb4.zip | |
ASoC: Samsung: I2S: Modify driver to give more flexibility
This patch modifies the i2s driver to give flexibility towards register
handling. This is a pre requirement for enabling i2s support on Exynos5420.
This patch modifies only the required registers as a pre-requirement to
support on Exynos5420.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/samsung/i2s-regs.h')
| -rw-r--r-- | sound/soc/samsung/i2s-regs.h | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/sound/soc/samsung/i2s-regs.h b/sound/soc/samsung/i2s-regs.h index c0e6d9a19efc..30513b7ede3a 100644 --- a/sound/soc/samsung/i2s-regs.h +++ b/sound/soc/samsung/i2s-regs.h @@ -95,22 +95,26 @@ #define MOD_RXONLY (1 << 8) #define MOD_TXRX (2 << 8) #define MOD_MASK (3 << 8) -#define MOD_LR_LLOW (0 << 7) -#define MOD_LR_RLOW (1 << 7) -#define MOD_SDF_IIS (0 << 5) -#define MOD_SDF_MSB (1 << 5) -#define MOD_SDF_LSB (2 << 5) -#define MOD_SDF_MASK (3 << 5) -#define MOD_RCLK_256FS (0 << 3) -#define MOD_RCLK_512FS (1 << 3) -#define MOD_RCLK_384FS (2 << 3) -#define MOD_RCLK_768FS (3 << 3) -#define MOD_RCLK_MASK (3 << 3) -#define MOD_BCLK_32FS (0 << 1) -#define MOD_BCLK_48FS (1 << 1) -#define MOD_BCLK_16FS (2 << 1) -#define MOD_BCLK_24FS (3 << 1) -#define MOD_BCLK_MASK (3 << 1) +#define MOD_LRP_SHIFT 7 +#define MOD_LR_LLOW 0 +#define MOD_LR_RLOW 1 +#define MOD_SDF_SHIFT 5 +#define MOD_SDF_IIS 0 +#define MOD_SDF_MSB 1 +#define MOD_SDF_LSB 2 +#define MOD_SDF_MASK 3 +#define MOD_RCLK_SHIFT 3 +#define MOD_RCLK_256FS 0 +#define MOD_RCLK_512FS 1 +#define MOD_RCLK_384FS 2 +#define MOD_RCLK_768FS 3 +#define MOD_RCLK_MASK 3 +#define MOD_BCLK_SHIFT 1 +#define MOD_BCLK_32FS 0 +#define MOD_BCLK_48FS 1 +#define MOD_BCLK_16FS 2 +#define MOD_BCLK_24FS 3 +#define MOD_BCLK_MASK 3 #define MOD_8BIT (1 << 0) #define MOD_CDCLKCON (1 << 12) |