diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-10-02 16:47:44 +0200 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-10-15 04:29:38 +0200 |
commit | b138707874729473bed70561c88566821156d6a6 (patch) | |
tree | bd5251a91ce59801bdb6143eaa389c4d5631e7f7 /sound/soc/samsung | |
parent | ASoC: bells: Correct typo in sub speaker DAI name for WM5110 (diff) | |
download | linux-b138707874729473bed70561c88566821156d6a6.tar.xz linux-b138707874729473bed70561c88566821156d6a6.zip |
ASoC: bells: Provide additional parameterisation
Not all CODEC devices have three audio interfaces and the clock rates
which support these things vary. Support this by using driver data to
supply the clock rates and by only completing the parts of system setup
which are required for the system.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/samsung')
-rw-r--r-- | sound/soc/samsung/bells.c | 122 |
1 files changed, 75 insertions, 47 deletions
diff --git a/sound/soc/samsung/bells.c b/sound/soc/samsung/bells.c index 293d2d9dfc12..588bb635b1de 100644 --- a/sound/soc/samsung/bells.c +++ b/sound/soc/samsung/bells.c @@ -18,15 +18,6 @@ #include "../codecs/wm5102.h" #include "../codecs/wm9081.h" -/* - * 44.1kHz based clocks for the SYSCLK domain, use a very high clock - * to allow all the DSP functionality to be enabled if desired. - */ -#define SYSCLK_RATE (44100 * 1024) - -/* 48kHz based clocks for the ASYNC domain */ -#define ASYNCCLK_RATE (48000 * 512) - /* BCLK2 is fixed at this currently */ #define BCLK2_RATE (64 * 8000) @@ -44,12 +35,28 @@ #define DAI_CODEC_CP 2 #define DAI_CODEC_SUB 3 +struct bells_drvdata { + int sysclk_rate; + int asyncclk_rate; +}; + +static struct bells_drvdata wm5102_drvdata = { + .sysclk_rate = 45158400, + .asyncclk_rate = 49152000, +}; + +static struct bells_drvdata wm5110_drvdata = { + .sysclk_rate = 135475200, + .asyncclk_rate = 147456000, +}; + static int bells_set_bias_level(struct snd_soc_card *card, struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) { struct snd_soc_dai *codec_dai = card->rtd[DAI_DSP_CODEC].codec_dai; struct snd_soc_codec *codec = codec_dai->codec; + struct bells_drvdata *bells = card->drvdata; int ret; if (dapm->dev != codec_dai->dev) @@ -57,18 +64,21 @@ static int bells_set_bias_level(struct snd_soc_card *card, switch (level) { case SND_SOC_BIAS_PREPARE: - if (dapm->bias_level == SND_SOC_BIAS_STANDBY) { - ret = snd_soc_codec_set_pll(codec, WM5102_FLL1, - ARIZONA_FLL_SRC_MCLK1, - MCLK_RATE, - SYSCLK_RATE); - if (ret < 0) - pr_err("Failed to start FLL: %d\n", ret); + if (dapm->bias_level != SND_SOC_BIAS_STANDBY) + break; + ret = snd_soc_codec_set_pll(codec, WM5102_FLL1, + ARIZONA_FLL_SRC_MCLK1, + MCLK_RATE, + bells->sysclk_rate); + if (ret < 0) + pr_err("Failed to start FLL: %d\n", ret); + + if (bells->asyncclk_rate) { ret = snd_soc_codec_set_pll(codec, WM5102_FLL2, ARIZONA_FLL_SRC_AIF2BCLK, BCLK2_RATE, - ASYNCCLK_RATE); + bells->asyncclk_rate); if (ret < 0) pr_err("Failed to start FLL: %d\n", ret); } @@ -87,6 +97,7 @@ static int bells_set_bias_level_post(struct snd_soc_card *card, { struct snd_soc_dai *codec_dai = card->rtd[DAI_DSP_CODEC].codec_dai; struct snd_soc_codec *codec = codec_dai->codec; + struct bells_drvdata *bells = card->drvdata; int ret; if (dapm->dev != codec_dai->dev) @@ -100,10 +111,13 @@ static int bells_set_bias_level_post(struct snd_soc_card *card, return ret; } - ret = snd_soc_codec_set_pll(codec, WM5102_FLL2, 0, 0, 0); - if (ret < 0) { - pr_err("Failed to stop FLL: %d\n", ret); - return ret; + if (bells->asyncclk_rate) { + ret = snd_soc_codec_set_pll(codec, WM5102_FLL2, + 0, 0, 0); + if (ret < 0) { + pr_err("Failed to stop FLL: %d\n", ret); + return ret; + } } break; @@ -118,14 +132,24 @@ static int bells_set_bias_level_post(struct snd_soc_card *card, static int bells_late_probe(struct snd_soc_card *card) { + struct bells_drvdata *bells = card->drvdata; struct snd_soc_codec *wm0010 = card->rtd[DAI_AP_DSP].codec; struct snd_soc_codec *codec = card->rtd[DAI_DSP_CODEC].codec; struct snd_soc_dai *aif1_dai = card->rtd[DAI_DSP_CODEC].codec_dai; - struct snd_soc_dai *aif2_dai = card->rtd[DAI_CODEC_CP].cpu_dai; - struct snd_soc_dai *aif3_dai = card->rtd[DAI_CODEC_SUB].cpu_dai; - struct snd_soc_dai *wm9081_dai = card->rtd[DAI_CODEC_SUB].codec_dai; + struct snd_soc_dai *aif2_dai; + struct snd_soc_dai *aif3_dai; + struct snd_soc_dai *wm9081_dai; int ret; + ret = snd_soc_codec_set_sysclk(codec, ARIZONA_CLK_SYSCLK, + ARIZONA_CLK_SRC_FLL1, + bells->sysclk_rate, + SND_SOC_CLOCK_IN); + if (ret != 0) { + dev_err(codec->dev, "Failed to set SYSCLK: %d\n", ret); + return ret; + } + ret = snd_soc_codec_set_sysclk(wm0010, 0, 0, SYS_MCLK_RATE, 0); if (ret != 0) { dev_err(wm0010->dev, "Failed to set WM0010 clock: %d\n", ret); @@ -133,43 +157,43 @@ static int bells_late_probe(struct snd_soc_card *card) } ret = snd_soc_dai_set_sysclk(aif1_dai, ARIZONA_CLK_SYSCLK, 0, 0); - if (ret != 0) { + if (ret != 0) dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret); - return ret; - } - ret = snd_soc_dai_set_sysclk(aif2_dai, ARIZONA_CLK_ASYNCCLK, 0, 0); - if (ret != 0) { - dev_err(aif2_dai->dev, "Failed to set AIF2 clock: %d\n", ret); - return ret; - } + ret = snd_soc_codec_set_sysclk(codec, ARIZONA_CLK_OPCLK, 0, + SYS_MCLK_RATE, SND_SOC_CLOCK_OUT); + if (ret != 0) + dev_err(codec->dev, "Failed to set OPCLK: %d\n", ret); - ret = snd_soc_dai_set_sysclk(aif3_dai, ARIZONA_CLK_SYSCLK, 0, 0); - if (ret != 0) { - dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret); - return ret; - } + if (card->num_rtd == DAI_CODEC_CP) + return 0; - ret = snd_soc_codec_set_sysclk(codec, ARIZONA_CLK_SYSCLK, - ARIZONA_CLK_SRC_FLL1, SYSCLK_RATE, + ret = snd_soc_codec_set_sysclk(codec, ARIZONA_CLK_ASYNCCLK, + ARIZONA_CLK_SRC_FLL2, + bells->asyncclk_rate, SND_SOC_CLOCK_IN); if (ret != 0) { - dev_err(codec->dev, "Failed to set SYSCLK: %d\n", ret); + dev_err(codec->dev, "Failed to set ASYNCCLK: %d\n", ret); return ret; } - ret = snd_soc_codec_set_sysclk(codec, ARIZONA_CLK_OPCLK, 0, - SYS_MCLK_RATE, SND_SOC_CLOCK_OUT); + aif2_dai = card->rtd[DAI_CODEC_CP].cpu_dai; + + ret = snd_soc_dai_set_sysclk(aif2_dai, ARIZONA_CLK_ASYNCCLK, 0, 0); if (ret != 0) { - dev_err(codec->dev, "Failed to set OPCLK: %d\n", ret); + dev_err(aif2_dai->dev, "Failed to set AIF2 clock: %d\n", ret); return ret; } - ret = snd_soc_codec_set_sysclk(codec, ARIZONA_CLK_ASYNCCLK, - ARIZONA_CLK_SRC_FLL2, ASYNCCLK_RATE, - SND_SOC_CLOCK_IN); + if (card->num_rtd == DAI_CODEC_SUB) + return 0; + + aif3_dai = card->rtd[DAI_CODEC_SUB].cpu_dai; + wm9081_dai = card->rtd[DAI_CODEC_SUB].codec_dai; + + ret = snd_soc_dai_set_sysclk(aif3_dai, ARIZONA_CLK_SYSCLK, 0, 0); if (ret != 0) { - dev_err(codec->dev, "Failed to set SYSCLK: %d\n", ret); + dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret); return ret; } @@ -318,6 +342,8 @@ static struct snd_soc_card bells_cards[] = { .set_bias_level = bells_set_bias_level, .set_bias_level_post = bells_set_bias_level_post, + + .drvdata = &wm5102_drvdata, }, { .name = "Bells WM5110", @@ -334,6 +360,8 @@ static struct snd_soc_card bells_cards[] = { .set_bias_level = bells_set_bias_level, .set_bias_level_post = bells_set_bias_level_post, + + .drvdata = &wm5110_drvdata, }, }; |