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authorBen Zhang <benzh@chromium.org>2015-12-15 22:51:25 +0100
committerMark Brown <broonie@kernel.org>2015-12-16 20:20:59 +0100
commit1aa844cd56c7a2b94824f02495ff7ae5d52a7e91 (patch)
tree3debf735ae039342cfad036c965904d5a0ffe5c4 /sound/soc/sti
parentASoC: rt5677: use 'active low' logic for reset pin (diff)
downloadlinux-1aa844cd56c7a2b94824f02495ff7ae5d52a7e91.tar.xz
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ASoC: rt5677: Reconfigure PLL1 after resume
Sometimes PLL1 stops working if the codec loses power during suspend (when pow-ldo2 or reset gpio is used). MX-7Bh(RT5677_PLL1_CTRL2) is cleared and won't be restored by regcache since it's volatile. MX-7Bh has one status bit and M code for PLL1. rt5677_set_dai_pll doesn't reconfigure PLL1 after resume because it thinks the PLL params are not changed. This patch clears the cached PLL params at resume so that rt5677_set_dai_pll can reconfigure the PLL after resume. Signed-off-by: Ben Zhang <benzh@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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