diff options
author | John Hsu <KCHSU0@nuvoton.com> | 2016-12-02 02:48:58 +0100 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2016-12-06 15:35:13 +0100 |
commit | 5f1516d52f9287a94dc3b9d57c370ed01802a911 (patch) | |
tree | 2e3436a473477e670ea9cfdefb91dcbf5b222538 /sound/soc | |
parent | ASoC: nau8825: lock longer to avoid playback pop upon resume (diff) | |
download | linux-5f1516d52f9287a94dc3b9d57c370ed01802a911.tar.xz linux-5f1516d52f9287a94dc3b9d57c370ed01802a911.zip |
ASoC: nau8825: disable sinc filter for high THD of ADC
This bit will enable 4th order SINC filter.
=1, filter will enable; but it consumes higher power.
=0, the sinc filter is disable, and it should always keep 0 value to
get high THD.
Therefor, disable the filter when codec initiation for better
performance when recording.
Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc')
-rw-r--r-- | sound/soc/codecs/nau8825.c | 3 | ||||
-rw-r--r-- | sound/soc/codecs/nau8825.h | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index 2b89569333a1..efe3a44658d5 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c @@ -1846,7 +1846,8 @@ static void nau8825_init_regs(struct nau8825 *nau8825) * (audible hiss). Set it to something better. */ regmap_update_bits(regmap, NAU8825_REG_ADC_RATE, - NAU8825_ADC_SYNC_DOWN_MASK, NAU8825_ADC_SYNC_DOWN_64); + NAU8825_ADC_SYNC_DOWN_MASK | NAU8825_ADC_SINC4_EN, + NAU8825_ADC_SYNC_DOWN_64); regmap_update_bits(regmap, NAU8825_REG_DAC_CTRL1, NAU8825_DAC_OVERSAMPLE_MASK, NAU8825_DAC_OVERSAMPLE_64); /* Disable DACR/L power */ diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index 0672a25617b9..5d1704e73241 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h @@ -269,6 +269,8 @@ #define NAU8825_BIQ_PATH_DAC (1 << NAU8825_BIQ_PATH_SFT) /* ADC_RATE (0x2b) */ +#define NAU8825_ADC_SINC4_SFT 4 +#define NAU8825_ADC_SINC4_EN (1 << NAU8825_ADC_SINC4_SFT) #define NAU8825_ADC_SYNC_DOWN_SFT 0 #define NAU8825_ADC_SYNC_DOWN_MASK 0x3 #define NAU8825_ADC_SYNC_DOWN_32 0 |