diff options
| author | Codrin Ciubotariu <codrin.ciubotariu@microchip.com> | 2019-02-18 17:10:32 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-02-18 18:41:16 +0100 |
| commit | 90f6e68031397fb6212bef5619193cd15707fa0f (patch) | |
| tree | 819824fabbdf3b11bcf9277e7bbd5cb9309005a6 /sound/soc | |
| parent | ASoC: codecs: ad193x: Set constraint to always have 32 sample bits (diff) | |
| download | linux-90f6e68031397fb6212bef5619193cd15707fa0f.tar.xz linux-90f6e68031397fb6212bef5619193cd15707fa0f.zip | |
ASoC: codecs: ad193x: Fix frame polarity for DSP_A format
By default, the codec starts to interpret the left (first) channel on
the falling edge (low polarity) of LRCLK. However, for DSP_A, the left
channel needs to start on the rising edge of LRCLK. This patch fixes
this channel swap by toggling the bit which selects the LRCLK polarity.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc')
| -rw-r--r-- | sound/soc/codecs/ad193x.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sound/soc/codecs/ad193x.c b/sound/soc/codecs/ad193x.c index c16c9969d1a0..315ec9775118 100644 --- a/sound/soc/codecs/ad193x.c +++ b/sound/soc/codecs/ad193x.c @@ -228,6 +228,12 @@ static int ad193x_set_dai_fmt(struct snd_soc_dai *codec_dai, return -EINVAL; } + /* For DSP_*, LRCLK's polarity must be inverted */ + if (fmt & SND_SOC_DAIFMT_DSP_A) { + change_bit(ffs(AD193X_DAC_LEFT_HIGH) - 1, + (unsigned long *)&dac_fmt); + } + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { case SND_SOC_DAIFMT_CBM_CFM: /* codec clk & frm master */ adc_fmt |= AD193X_ADC_LCR_MASTER; |