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authorColin Ian King <colin.king@canonical.com>2019-09-06 18:14:04 +0200
committerMark Brown <broonie@kernel.org>2019-09-09 11:50:51 +0200
commit78b93b04771bdbefe94b84222506ba992f579c98 (patch)
treec7b4ae473da0bd23b5553222c3a8c3dc04a31aec /sound
parentASoC: es8316: support fixed and variable both clock rates (diff)
downloadlinux-78b93b04771bdbefe94b84222506ba992f579c98.tar.xz
linux-78b93b04771bdbefe94b84222506ba992f579c98.zip
ASoC: codecs: ad193x: make two arrays static const, makes object smaller
Don't populate the arrays on the stack but instead make them static const. Makes the object code smaller by 37 bytes. Before: text data bss dec hex filename 16253 7200 0 23453 5b9d sound/soc/codecs/ad193x.o After: text data bss dec hex filename 16056 7360 0 23416 5b78 sound/soc/codecs/ad193x.o (gcc version 9.2.1, amd64) Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20190906161404.1440-1-colin.king@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/ad193x.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/codecs/ad193x.c b/sound/soc/codecs/ad193x.c
index fb04c9379b71..980e024a5720 100644
--- a/sound/soc/codecs/ad193x.c
+++ b/sound/soc/codecs/ad193x.c
@@ -416,7 +416,7 @@ static struct snd_soc_dai_driver ad193x_no_adc_dai = {
/* codec register values to set after reset */
static void ad193x_reg_default_init(struct ad193x_priv *ad193x)
{
- const struct reg_sequence reg_init[] = {
+ static const struct reg_sequence reg_init[] = {
{ 0, 0x99 }, /* PLL_CLK_CTRL0: pll input: mclki/xi 12.288Mhz */
{ 1, 0x04 }, /* PLL_CLK_CTRL1: no on-chip Vref */
{ 2, 0x40 }, /* DAC_CTRL0: TDM mode */
@@ -432,7 +432,7 @@ static void ad193x_reg_default_init(struct ad193x_priv *ad193x)
{ 12, 0x00 }, /* DAC_L4_VOL: no attenuation */
{ 13, 0x00 }, /* DAC_R4_VOL: no attenuation */
};
- const struct reg_sequence reg_adc_init[] = {
+ static const struct reg_sequence reg_adc_init[] = {
{ 14, 0x03 }, /* ADC_CTRL0: high-pass filter enable */
{ 15, 0x43 }, /* ADC_CTRL1: sata delay=1, adc aux mode */
{ 16, 0x00 }, /* ADC_CTRL2: reset */