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| author | Ingo Molnar <mingo@kernel.org> | 2017-08-29 23:13:56 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2017-08-29 23:13:56 +0200 |
| commit | 1b2f76d77a277bb70d38ad0991ed7f16bbc115a9 (patch) | |
| tree | b02f9b167b1c1b9df860f480b45523c70ef52acf /tools/arch/x86/include/asm/cpufeatures.h | |
| parent | perf/x86: Fix caps/ for !Intel (diff) | |
| parent | perf symbols: Fix plt entry calculation for ARM and AARCH64 (diff) | |
| download | linux-1b2f76d77a277bb70d38ad0991ed7f16bbc115a9.tar.xz linux-1b2f76d77a277bb70d38ad0991ed7f16bbc115a9.zip | |
Merge tag 'perf-core-for-mingo-4.14-20170829' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo:
- Fix remote HITM detection for Skylake in 'perf c2c' (Jiri Olsa)
- Fixes for the handling of PERF_RECORD_READ records (Jiri Olsa)
- Fix kprobes blackist symbol lookup in 'perf probe' (Li Bin)
- The PLT header and entry sizes are not the same in !x86, fix it for ARM and
AARCH64 (Li Bin)
- Beautify pkey_{alloc,free,mprotect} arguments in 'perf trace' (Arnaldo Carvalho de Melo)
- Fix CC, AR, LD external definition, allow flex and bison to be
externally defined and other related Makefile fixes (David Carrillo-Cisneros)
- Sync CPU features kernel ABI headers with tooling headers (Arnaldo Carvalho de Melo)
- Fix path to PMU formats in 'perf stat' documentation (Jack Henschel)
- Fix static build with newer toolchains (Jiri Olsa)
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'tools/arch/x86/include/asm/cpufeatures.h')
| -rw-r--r-- | tools/arch/x86/include/asm/cpufeatures.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h index 14f0f2913364..8ea315a11fe0 100644 --- a/tools/arch/x86/include/asm/cpufeatures.h +++ b/tools/arch/x86/include/asm/cpufeatures.h @@ -177,7 +177,7 @@ #define X86_FEATURE_PERFCTR_NB ( 6*32+24) /* NB performance counter extensions */ #define X86_FEATURE_BPEXT (6*32+26) /* data breakpoint extension */ #define X86_FEATURE_PTSC ( 6*32+27) /* performance time-stamp counter */ -#define X86_FEATURE_PERFCTR_L2 ( 6*32+28) /* L2 performance counter extensions */ +#define X86_FEATURE_PERFCTR_LLC ( 6*32+28) /* Last Level Cache performance counter extensions */ #define X86_FEATURE_MWAITX ( 6*32+29) /* MWAIT extension (MONITORX/MWAITX) */ /* @@ -196,7 +196,6 @@ #define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ -#define X86_FEATURE_SME ( 7*32+10) /* AMD Secure Memory Encryption */ #define X86_FEATURE_INTEL_PPIN ( 7*32+14) /* Intel Processor Inventory Number */ #define X86_FEATURE_INTEL_PT ( 7*32+15) /* Intel Processor Trace */ @@ -287,7 +286,7 @@ #define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */ #define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */ #define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */ -#define X86_FEATURE_VIRTUAL_VMLOAD_VMSAVE (15*32+15) /* Virtual VMLOAD VMSAVE */ +#define X86_FEATURE_V_VMSAVE_VMLOAD (15*32+15) /* Virtual VMSAVE VMLOAD */ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */ #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/ |