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author | Dan Williams <dan.j.williams@intel.com> | 2022-11-14 19:29:52 +0100 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2022-11-14 19:39:10 +0100 |
commit | 76f191108419424fef1bb713d8d160c3b49bedc4 (patch) | |
tree | 31079a1db862bbd9de872c69660f3e7ec52719fc /tools/build | |
parent | cxl: Unify debug messages when calling devm_cxl_add_dport() (diff) | |
download | linux-76f191108419424fef1bb713d8d160c3b49bedc4.tar.xz linux-76f191108419424fef1bb713d8d160c3b49bedc4.zip |
tools/testing/cxl: Add bridge mocking support
In preparation for cxl_acpi walking pci_root->bus->bridge, add that
association to the mock pci_root instances.
Note that the missing 3rd entry in mock_pci_root[] was not noticed until
now given that the test version of to_cxl_host_bridge()
(tools/testing/cxl/mock_acpi.c), obviated the need for that entry.
However, "cxl/acpi: Improve debug messages in cxl_acpi_probe()" [1]
needs pci_root->bus->bridge to be populated.
Link: https://lore.kernel.org/r/20221018132341.76259-6-rrichter@amd.com [1]
Cc: Robert Richter <rrichter@amd.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/build')
0 files changed, 0 insertions, 0 deletions