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authorPeter Zijlstra <peterz@infradead.org>2022-06-14 23:15:58 +0200
committerBorislav Petkov <bp@suse.de>2022-06-27 10:33:59 +0200
commitbf5835bcdb9635c97f85120dba9bfa21e111130f (patch)
treec5d11e696c13f6a27b6fe1703f293b6e6b6655d6 /tools/objtool
parentx86/bugs: Report Intel retbleed vulnerability (diff)
downloadlinux-bf5835bcdb9635c97f85120dba9bfa21e111130f.tar.xz
linux-bf5835bcdb9635c97f85120dba9bfa21e111130f.zip
intel_idle: Disable IBRS during long idle
Having IBRS enabled while the SMT sibling is idle unnecessarily slows down the running sibling. OTOH, disabling IBRS around idle takes two MSR writes, which will increase the idle latency. Therefore, only disable IBRS around deeper idle states. Shallow idle states are bounded by the tick in duration, since NOHZ is not allowed for them by virtue of their short target residency. Only do this for mwait-driven idle, since that keeps interrupts disabled across idle, which makes disabling IBRS vs IRQ-entry a non-issue. Note: C6 is a random threshold, most importantly C1 probably shouldn't disable IBRS, benchmarking needed. Suggested-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'tools/objtool')
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