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| author | Romain Naour <romain.naour@gmail.com> | 2021-04-20 23:12:10 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2021-04-23 13:42:05 +0200 |
| commit | 1d7ba0165d8206ac073f7ac3b14fc0836b66eae7 (patch) | |
| tree | 22d5eaadd0aa66a040cc456f795f694b50020bc0 /tools/power/x86/intel-speed-select/isst-display.c | |
| parent | MIPS:DTS:Correct the license for Loongson-2K (diff) | |
| download | linux-1d7ba0165d8206ac073f7ac3b14fc0836b66eae7.tar.xz linux-1d7ba0165d8206ac073f7ac3b14fc0836b66eae7.zip | |
mips: Do not include hi and lo in clobber list for R6
From [1]
"GCC 10 (PR 91233) won't silently allow registers that are not
architecturally available to be present in the clobber list anymore,
resulting in build failure for mips*r6 targets in form of:
...
.../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target
146 | __asm__ volatile ( \
| ^~~~~~~
This is because base R6 ISA doesn't define hi and lo registers w/o DSP
extension. This patch provides the alternative clobber list for r6 targets
that won't include those registers."
Since kernel 5.4 and mips support for generic vDSO [2], the kernel fail to
build for mips r6 cpus with gcc 10 for the same reason as glibc.
[1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8
[2] '24640f233b46 ("mips: Add support for generic vDSO")'
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/power/x86/intel-speed-select/isst-display.c')
0 files changed, 0 insertions, 0 deletions