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| author | Dan Williams <dan.j.williams@intel.com> | 2022-11-14 19:29:52 +0100 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-11-14 19:39:10 +0100 |
| commit | 76f191108419424fef1bb713d8d160c3b49bedc4 (patch) | |
| tree | 31079a1db862bbd9de872c69660f3e7ec52719fc /tools/testing/cxl | |
| parent | cxl: Unify debug messages when calling devm_cxl_add_dport() (diff) | |
| download | linux-76f191108419424fef1bb713d8d160c3b49bedc4.tar.xz linux-76f191108419424fef1bb713d8d160c3b49bedc4.zip | |
tools/testing/cxl: Add bridge mocking support
In preparation for cxl_acpi walking pci_root->bus->bridge, add that
association to the mock pci_root instances.
Note that the missing 3rd entry in mock_pci_root[] was not noticed until
now given that the test version of to_cxl_host_bridge()
(tools/testing/cxl/mock_acpi.c), obviated the need for that entry.
However, "cxl/acpi: Improve debug messages in cxl_acpi_probe()" [1]
needs pci_root->bus->bridge to be populated.
Link: https://lore.kernel.org/r/20221018132341.76259-6-rrichter@amd.com [1]
Cc: Robert Richter <rrichter@amd.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl')
| -rw-r--r-- | tools/testing/cxl/test/cxl.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index a5146d80ecc4..facfcd11cb67 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -439,14 +439,18 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname, return AE_OK; } -static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES]; -static struct acpi_pci_root mock_pci_root[NR_CXL_HOST_BRIDGES] = { +static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST]; +static struct acpi_pci_root mock_pci_root[ARRAY_SIZE(mock_pci_bus)] = { [0] = { .bus = &mock_pci_bus[0], }, [1] = { .bus = &mock_pci_bus[1], }, + [2] = { + .bus = &mock_pci_bus[2], + }, + }; static bool is_mock_bus(struct pci_bus *bus) @@ -744,6 +748,7 @@ static __init int cxl_single_init(void) } cxl_hb_single[i] = pdev; + mock_pci_bus[i + NR_CXL_HOST_BRIDGES].bridge = &pdev->dev; rc = sysfs_create_link(&pdev->dev.kobj, &pdev->dev.kobj, "physical_node"); if (rc) @@ -910,6 +915,7 @@ static __init int cxl_test_init(void) } cxl_host_bridge[i] = pdev; + mock_pci_bus[i].bridge = &pdev->dev; rc = sysfs_create_link(&pdev->dev.kobj, &pdev->dev.kobj, "physical_node"); if (rc) |