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| author | Oliver Upton <oliver.upton@linux.dev> | 2024-08-29 02:46:22 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2024-08-29 09:34:03 +0200 |
| commit | 4641c7ea88d1029500ff64c4d0a1df0584b1bfcc (patch) | |
| tree | 7aa9dc468d987cbb5e070a27f8d911a073abadeb /tools/testing/selftests/kvm | |
| parent | KVM: arm64: Add selftest checking how the absence of GICv3 is handled (diff) | |
| download | linux-4641c7ea88d1029500ff64c4d0a1df0584b1bfcc.tar.xz linux-4641c7ea88d1029500ff64c4d0a1df0584b1bfcc.zip | |
KVM: arm64: selftests: Cope with lack of GICv3 in set_id_regs
Broonie reports that the set_id_regs test is failing as of commit
5cb57a1aff75 ("KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is
presented to the guest"). The test does not anticipate the 'late' ID
register fixup where KVM clobbers the GIC field in absence of GICv3.
While the field technically has FTR_LOWER_SAFE behavior, fix the issue
by setting it to an exact value of 0, matching the effect of the 'late'
fixup.
Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Link: https://lore.kernel.org/r/20240829004622.3058639-1-oliver.upton@linux.dev
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'tools/testing/selftests/kvm')
| -rw-r--r-- | tools/testing/selftests/kvm/aarch64/set_id_regs.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/testing/selftests/kvm/aarch64/set_id_regs.c b/tools/testing/selftests/kvm/aarch64/set_id_regs.c index d20981663831..2a3fe7914b72 100644 --- a/tools/testing/selftests/kvm/aarch64/set_id_regs.c +++ b/tools/testing/selftests/kvm/aarch64/set_id_regs.c @@ -126,6 +126,7 @@ static const struct reg_ftr_bits ftr_id_aa64pfr0_el1[] = { REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, CSV2, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, DIT, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, SEL2, 0), + REG_FTR_BITS(FTR_EXACT, ID_AA64PFR0_EL1, GIC, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, EL3, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, EL2, 0), REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64PFR0_EL1, EL1, 0), |