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author | Matt Redfearn <matt.redfearn@imgtec.com> | 2015-12-18 13:47:00 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2016-01-24 02:09:53 +0100 |
commit | 497e803ebf98ea88c7191e67333bfcc6ffd64bc6 (patch) | |
tree | 13da5debc46182d0033906606f0098170b91889c /tools | |
parent | MIPS: io.h: Define `ioremap_cache' (diff) | |
download | linux-497e803ebf98ea88c7191e67333bfcc6ffd64bc6.tar.xz linux-497e803ebf98ea88c7191e67333bfcc6ffd64bc6.zip |
MIPS: smp-cps: Ensure secondary cores start with EVA disabled
The kernel currently assumes that a core will start up in legacy mode
using the exception base provided through the CM GCR registers. If a
core has been configured in hardware to start in EVA mode, these
assumptions will fail.
This patch ensures that secondary cores are initialized to meet these
assumptions.
Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11907/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions