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author | Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> | 2016-03-07 14:02:18 +0100 |
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committer | Ingo Molnar <mingo@kernel.org> | 2016-03-08 11:48:14 +0100 |
commit | be0aec23bf4624fd55650629fe8df20483487049 (patch) | |
tree | 2544c2eee3714bdc6176e6a400f158e127f01aa1 /tools | |
parent | x86/mce: Move MCx_CONFIG MSR definitions (diff) | |
download | linux-be0aec23bf4624fd55650629fe8df20483487049.tar.xz linux-be0aec23bf4624fd55650629fe8df20483487049.zip |
x86/mce/AMD, EDAC: Enable error decoding of Scalable MCA errors
For Scalable MCA enabled processors, errors are listed per IP block. And
since it is not required for an IP to map to a particular bank, we need
to use HWID and McaType values from the MCx_IPID register to figure out
which IP a given bank represents.
We also have a new bit (TCC) in the MCx_STATUS register to indicate Task
context is corrupt.
Add logic here to decode errors from all known IP blocks for Fam17h
Model 00-0fh and to print TCC errors.
[ Minor fixups. ]
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1457021458-2522-3-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions