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author | Christoffer Dall <christoffer.dall@linaro.org> | 2016-09-27 03:51:47 +0200 |
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committer | Christoffer Dall <christoffer.dall@linaro.org> | 2016-09-27 18:57:07 +0200 |
commit | 6fe407f2d18a4f94216263f91cb7d1f08fa5887c (patch) | |
tree | 7dbeb6562c31a5a2ec73bae880966bdbd115c1c0 /usr | |
parent | ARM: gic-v3: Work around definition of gic_write_bpr1 (diff) | |
download | linux-6fe407f2d18a4f94216263f91cb7d1f08fa5887c.tar.xz linux-6fe407f2d18a4f94216263f91cb7d1f08fa5887c.zip |
KVM: arm64: Require in-kernel irqchip for PMU support
If userspace creates a PMU for the VCPU, but doesn't create an in-kernel
irqchip, then we end up in a nasty path where we try to take an
uninitialized spinlock, which can lead to all sorts of breakages.
Luckily, QEMU always creates the VGIC before the PMU, so we can
establish this as ABI and check for the VGIC in the PMU init stage.
This can be relaxed at a later time if we want to support PMU with a
userspace irqchip.
Cc: stable@vger.kernel.org
Cc: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'usr')
0 files changed, 0 insertions, 0 deletions