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authorAndre Przywara <andre.przywara@arm.com>2014-06-03 10:13:13 +0200
committerChristoffer Dall <christoffer.dall@linaro.org>2015-01-20 18:25:32 +0100
commit6d52f35af10cf24d59b43f3fd8c938ad23cab543 (patch)
treec20bda289d5090b4a4411a53b0a9a346ffa3df1b /virt/kvm/arm/vgic-v2.c
parentarm64: GICv3: introduce symbolic names for GICv3 ICC_SGI1R_EL1 fields (diff)
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arm64: KVM: add SGI generation register emulation
While the generation of a (virtual) inter-processor interrupt (SGI) on a GICv2 works by writing to a MMIO register, GICv3 uses the system register ICC_SGI1R_EL1 to trigger them. Add a trap handler function that calls the new SGI register handler in the GICv3 code. As ICC_SRE_EL1.SRE at this point is still always 0, this will not trap yet, but will only be used later when all the data structures have been initialized properly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'virt/kvm/arm/vgic-v2.c')
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