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| author | David Daney <david.daney@cavium.com> | 2017-06-09 13:49:48 +0200 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2017-06-15 10:45:04 +0200 |
| commit | 690a341577f9adf2c275ababe0dcefe91898bbf0 (patch) | |
| tree | 1a39e66e7e4756444bdf8e7bc8b22cbc01095fe6 /virt/kvm/arm/vgic/vgic-v3.c | |
| parent | arm64: Add MIDR values for Cavium cn83XX SoCs (diff) | |
| download | linux-690a341577f9adf2c275ababe0dcefe91898bbf0.tar.xz linux-690a341577f9adf2c275ababe0dcefe91898bbf0.zip | |
arm64: Add workaround for Cavium Thunder erratum 30115
Some Cavium Thunder CPUs suffer a problem where a KVM guest may
inadvertently cause the host kernel to quit receiving interrupts.
Use the Group-0/1 trapping in order to deal with it.
[maz]: Adapted patch to the Group-0/1 trapping, reworked commit log
Tested-by: Alexander Graf <agraf@suse.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'virt/kvm/arm/vgic/vgic-v3.c')
| -rw-r--r-- | virt/kvm/arm/vgic/vgic-v3.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c index 828ca7f9a060..35c00efc110b 100644 --- a/virt/kvm/arm/vgic/vgic-v3.c +++ b/virt/kvm/arm/vgic/vgic-v3.c @@ -501,6 +501,13 @@ int vgic_v3_probe(const struct gic_kvm_info *info) if (kvm_vgic_global_state.vcpu_base == 0) kvm_info("disabling GICv2 emulation\n"); +#ifdef CONFIG_ARM64 + if (cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_30115)) { + group0_trap = true; + group1_trap = true; + } +#endif + if (group0_trap || group1_trap) { kvm_info("GICv3 sysreg trapping enabled (reduced performance)\n"); static_branch_enable(&vgic_v3_cpuif_trap); |