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authorShaokun Zhang <zhangshaokun@hisilicon.com>2018-07-19 13:26:40 +0200
committerWill Deacon <will.deacon@arm.com>2018-07-24 16:40:43 +0200
commit06060ea7fb5b6b9b4c3251e0dcabbcca8ad91674 (patch)
tree7fa83608580ccdbd9602095a246d0a5b07c737e3 /virt
parentarm64: perf: Add support for chaining event counters (diff)
downloadlinux-06060ea7fb5b6b9b4c3251e0dcabbcca8ad91674.tar.xz
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drivers/perf: hisi: update the sccl_id/ccl_id when MT is supported
MT bit in MPIDR_EL1 is now supported in certain HiSilicon platforms, so the mapping between sccl_id/ccl_id and affinity level needs to be updated from the generic encoding we originally used. Cc: John Garry <john.garry@huawei.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com> [will: fixed comment] Signed-off-by: Will Deacon <will.deacon@arm.com>
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