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| author | Andre Przywara <andre.przywara@arm.com> | 2017-03-06 02:35:56 +0100 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2017-03-15 12:19:12 +0100 |
| commit | 11282a49b735ad7f4cea187de2b8dc5489343e4b (patch) | |
| tree | cf687c8ef0ae165befe0266bb59bb8f841c25fcc /virt | |
| parent | reset: Add Altera Arria10 SR Reset Controller (diff) | |
| download | linux-11282a49b735ad7f4cea187de2b8dc5489343e4b.tar.xz linux-11282a49b735ad7f4cea187de2b8dc5489343e4b.zip | |
reset: sunxi: fix for 64-bit compilation
The Allwinner reset controller has 32-bit registers, so translating
the reset cell number into a register and bit offset should not use
any architecture dependent data size. Otherwise this breaks for 64-bit
architectures like arm64.
Fix this by making it clear that it's the hardware register width which
matters here in the calculation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'virt')
0 files changed, 0 insertions, 0 deletions