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author | Marc Zyngier <marc.zyngier@arm.com> | 2016-03-03 16:43:58 +0100 |
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committer | Marc Zyngier <marc.zyngier@arm.com> | 2016-03-09 05:24:09 +0100 |
commit | 0d98d00b8d80bfdee95cf7e85f20f107377e2662 (patch) | |
tree | 0962d058aec3a40e6e6488856e6a3b4a5f89f2c5 /virt | |
parent | arm64: KVM: vgic-v3: Do not save an LR known to be empty (diff) | |
download | linux-0d98d00b8d80bfdee95cf7e85f20f107377e2662.tar.xz linux-0d98d00b8d80bfdee95cf7e85f20f107377e2662.zip |
arm64: KVM: vgic-v3: Reset LRs at boot time
In order to let the GICv3 code be more lazy in the way it
accesses the LRs, it is necessary to start with a clean slate.
Let's reset the LRs on each CPU when the vgic is probed (which
includes a round trip to EL2...).
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'virt')
-rw-r--r-- | virt/kvm/arm/vgic-v3.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/virt/kvm/arm/vgic-v3.c b/virt/kvm/arm/vgic-v3.c index 11b5ff6ce81c..999bdc6d9d9f 100644 --- a/virt/kvm/arm/vgic-v3.c +++ b/virt/kvm/arm/vgic-v3.c @@ -216,6 +216,11 @@ static const struct vgic_ops vgic_v3_ops = { static struct vgic_params vgic_v3_params; +static void vgic_cpu_init_lrs(void *params) +{ + kvm_call_hyp(__vgic_v3_init_lrs); +} + /** * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT * @node: pointer to the DT node @@ -284,6 +289,8 @@ int vgic_v3_probe(struct device_node *vgic_node, kvm_info("%s@%llx IRQ%d\n", vgic_node->name, vcpu_res.start, vgic->maint_irq); + on_each_cpu(vgic_cpu_init_lrs, vgic, 1); + *ops = &vgic_v3_ops; *params = vgic; |