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-rw-r--r--drivers/gpio/gpio-zynq.c19
1 files changed, 9 insertions, 10 deletions
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 8a04e00bef32..ba1150744b61 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c
@@ -708,23 +708,23 @@ static int zynq_gpio_probe(struct platform_device *pdev)
chip->base = -1;
chip->ngpio = gpio->p_data->ngpio;
- /* Enable GPIO clock */
+ /* Retrieve GPIO clock */
gpio->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(gpio->clk)) {
dev_err(&pdev->dev, "input clock not found.\n");
return PTR_ERR(gpio->clk);
}
- ret = clk_prepare_enable(gpio->clk);
- if (ret) {
- dev_err(&pdev->dev, "Unable to enable clock.\n");
+
+ pm_runtime_enable(&pdev->dev);
+ ret = pm_runtime_get_sync(&pdev->dev);
+ if (ret < 0)
return ret;
- }
/* report a bug if gpio chip registration fails */
ret = gpiochip_add(chip);
if (ret) {
dev_err(&pdev->dev, "Failed to add gpio chip\n");
- goto err_disable_clk;
+ goto err_pm_put;
}
/* disable interrupts for all banks */
@@ -742,15 +742,14 @@ static int zynq_gpio_probe(struct platform_device *pdev)
gpiochip_set_chained_irqchip(chip, &zynq_gpio_edge_irqchip, gpio->irq,
zynq_gpio_irqhandler);
- pm_runtime_set_active(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
+ pm_runtime_put(&pdev->dev);
return 0;
err_rm_gpiochip:
gpiochip_remove(chip);
-err_disable_clk:
- clk_disable_unprepare(gpio->clk);
+err_pm_put:
+ pm_runtime_put(&pdev->dev);
return ret;
}