diff options
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt | 23 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 17 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria5.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_vt.dts | 11 |
5 files changed, 3 insertions, 70 deletions
diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt deleted file mode 100644 index 4897bea7e3f8..000000000000 --- a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Altera SOCFPGA specific extensions to the Synopsys Designware Mobile - Storage Host Controller - -The Synopsys designware mobile storage host controller is used to interface -a SoC with storage medium such as eMMC or SD/MMC cards. This file documents -differences between the core Synopsys dw mshc controller properties described -by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific -extensions to the Synopsys Designware Mobile Storage Host Controller. - -Required Properties: - -* compatible: should be - - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform - -Example: - - mmc: dwmmc0@ff704000 { - compatible = "altr,socfpga-dw-mshc"; - reg = <0xff704000 0x1000>; - interrupts = <0 129 4>; - #address-cells = <1>; - #size-cells = <0>; - }; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 5f582467fccc..537f1a5c07f5 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -473,17 +473,6 @@ arm,data-latency = <2 1 1>; }; - mmc: dwmmc0@ff704000 { - compatible = "altr,socfpga-dw-mshc"; - reg = <0xff704000 0x1000>; - interrupts = <0 139 4>; - fifo-depth = <0x400>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&l4_mp_clk>, <&sdmmc_clk>; - clock-names = "biu", "ciu"; - }; - /* Local timer */ timer@fffec600 { compatible = "arm,cortex-a9-twd-timer"; @@ -538,8 +527,8 @@ }; sysmgr@ffd08000 { - compatible = "altr,sys-mgr", "syscon"; - reg = <0xffd08000 0x4000>; - }; + compatible = "altr,sys-mgr"; + reg = <0xffd08000 0x4000>; + }; }; }; diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index 6c87b7070ca7..a85b4043f888 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi @@ -27,17 +27,6 @@ }; }; - dwmmc0@ff704000 { - num-slots = <1>; - supports-highspeed; - broken-cd; - - slot@0 { - reg = <0>; - bus-width = <4>; - }; - }; - serial0@ffc02000 { clock-frequency = <100000000>; }; diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index ca41b0ebf461..a8716f6dbe2e 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -28,17 +28,6 @@ }; }; - dwmmc0@ff704000 { - num-slots = <1>; - supports-highspeed; - broken-cd; - - slot@0 { - reg = <0>; - bus-width = <4>; - }; - }; - ethernet@ff702000 { phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index 222313f5420b..d1ec0cab2dee 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts @@ -41,17 +41,6 @@ }; }; - dwmmc0@ff704000 { - num-slots = <1>; - supports-highspeed; - broken-cd; - - slot@0 { - reg = <0>; - bus-width = <4>; - }; - }; - ethernet@ff700000 { phy-mode = "gmii"; status = "okay"; |