diff options
-rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 20 | ||||
-rw-r--r-- | arch/arm/boot/dts/zynq-zc702.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/zynq-zc706.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/zynq-zed.dts | 4 |
4 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 5d7681be0580..8b67b19392ec 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -102,6 +102,26 @@ clock-names = "pclk", "hclk", "tx_clk"; }; + sdhci0: ps7-sdhci@e0100000 { + compatible = "arasan,sdhci-8.9a"; + status = "disabled"; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&clkc 21>, <&clkc 32>; + interrupt-parent = <&intc>; + interrupts = <0 24 4>; + reg = <0xe0100000 0x1000>; + } ; + + sdhci1: ps7-sdhci@e0101000 { + compatible = "arasan,sdhci-8.9a"; + status = "disabled"; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&clkc 22>, <&clkc 33>; + interrupt-parent = <&intc>; + interrupts = <0 47 4>; + reg = <0xe0101000 0x1000>; + } ; + slcr: slcr@f8000000 { compatible = "xlnx,zynq-slcr"; reg = <0xF8000000 0x1000>; diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 34d680a46b7e..c913f77a21eb 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -34,6 +34,10 @@ phy-mode = "rgmii"; }; +&sdhci0 { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts index b2835d5fc09a..88f62c50382e 100644 --- a/arch/arm/boot/dts/zynq-zc706.dts +++ b/arch/arm/boot/dts/zynq-zc706.dts @@ -35,6 +35,10 @@ phy-mode = "rgmii"; }; +&sdhci0 { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts index 2eda06889dfc..82d7ef1a9a9c 100644 --- a/arch/arm/boot/dts/zynq-zed.dts +++ b/arch/arm/boot/dts/zynq-zed.dts @@ -35,6 +35,10 @@ phy-mode = "rgmii"; }; +&sdhci0 { + status = "okay"; +}; + &uart1 { status = "okay"; }; |