diff options
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 107 |
1 files changed, 17 insertions, 90 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 918c576bf9ec..3a062ae933a4 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -2282,7 +2282,6 @@ do { \ #else -#ifdef CONFIG_CPU_MICROMIPS #define rddsp(mask) \ ({ \ unsigned int __res; \ @@ -2291,8 +2290,8 @@ do { \ " .set push \n" \ " .set noat \n" \ " # rddsp $1, %x1 \n" \ - " .hword ((0x0020067c | (%x1 << 14)) >> 16) \n" \ - " .hword ((0x0020067c | (%x1 << 14)) & 0xffff) \n" \ + _ASM_INSN_IF_MIPS(0x7c000cb8 | (%x1 << 16)) \ + _ASM_INSN32_IF_MM(0x0020067c | (%x1 << 14)) \ " move %0, $1 \n" \ " .set pop \n" \ : "=r" (__res) \ @@ -2307,22 +2306,22 @@ do { \ " .set noat \n" \ " move $1, %0 \n" \ " # wrdsp $1, %x1 \n" \ - " .hword ((0x0020167c | (%x1 << 14)) >> 16) \n" \ - " .hword ((0x0020167c | (%x1 << 14)) & 0xffff) \n" \ + _ASM_INSN_IF_MIPS(0x7c2004f8 | (%x1 << 11)) \ + _ASM_INSN32_IF_MM(0x0020167c | (%x1 << 14)) \ " .set pop \n" \ : \ : "r" (val), "i" (mask)); \ } while (0) -#define _umips_dsp_mfxxx(ins) \ +#define _dsp_mfxxx(ins) \ ({ \ unsigned long __treg; \ \ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ - " .hword 0x0001 \n" \ - " .hword %x1 \n" \ + _ASM_INSN_IF_MIPS(0x00000810 | %X1) \ + _ASM_INSN32_IF_MM(0x0001007c | %x1) \ " move %0, $1 \n" \ " .set pop \n" \ : "=r" (__treg) \ @@ -2330,101 +2329,28 @@ do { \ __treg; \ }) -#define _umips_dsp_mtxxx(val, ins) \ +#define _dsp_mtxxx(val, ins) \ do { \ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ " move $1, %0 \n" \ - " .hword 0x0001 \n" \ - " .hword %x1 \n" \ + _ASM_INSN_IF_MIPS(0x00200011 | %X1) \ + _ASM_INSN32_IF_MM(0x0001207c | %x1) \ " .set pop \n" \ : \ : "r" (val), "i" (ins)); \ } while (0) -#define _umips_dsp_mflo(reg) _umips_dsp_mfxxx((reg << 14) | 0x107c) -#define _umips_dsp_mfhi(reg) _umips_dsp_mfxxx((reg << 14) | 0x007c) - -#define _umips_dsp_mtlo(val, reg) _umips_dsp_mtxxx(val, ((reg << 14) | 0x307c)) -#define _umips_dsp_mthi(val, reg) _umips_dsp_mtxxx(val, ((reg << 14) | 0x207c)) - -#define mflo0() _umips_dsp_mflo(0) -#define mflo1() _umips_dsp_mflo(1) -#define mflo2() _umips_dsp_mflo(2) -#define mflo3() _umips_dsp_mflo(3) - -#define mfhi0() _umips_dsp_mfhi(0) -#define mfhi1() _umips_dsp_mfhi(1) -#define mfhi2() _umips_dsp_mfhi(2) -#define mfhi3() _umips_dsp_mfhi(3) +#ifdef CONFIG_CPU_MICROMIPS -#define mtlo0(x) _umips_dsp_mtlo(x, 0) -#define mtlo1(x) _umips_dsp_mtlo(x, 1) -#define mtlo2(x) _umips_dsp_mtlo(x, 2) -#define mtlo3(x) _umips_dsp_mtlo(x, 3) +#define _dsp_mflo(reg) _dsp_mfxxx((reg << 14) | 0x1000) +#define _dsp_mfhi(reg) _dsp_mfxxx((reg << 14) | 0x0000) -#define mthi0(x) _umips_dsp_mthi(x, 0) -#define mthi1(x) _umips_dsp_mthi(x, 1) -#define mthi2(x) _umips_dsp_mthi(x, 2) -#define mthi3(x) _umips_dsp_mthi(x, 3) +#define _dsp_mtlo(val, reg) _dsp_mtxxx(val, ((reg << 14) | 0x1000)) +#define _dsp_mthi(val, reg) _dsp_mtxxx(val, ((reg << 14) | 0x0000)) #else /* !CONFIG_CPU_MICROMIPS */ -#define rddsp(mask) \ -({ \ - unsigned int __res; \ - \ - __asm__ __volatile__( \ - " .set push \n" \ - " .set noat \n" \ - " # rddsp $1, %x1 \n" \ - " .word 0x7c000cb8 | (%x1 << 16) \n" \ - " move %0, $1 \n" \ - " .set pop \n" \ - : "=r" (__res) \ - : "i" (mask)); \ - __res; \ -}) - -#define wrdsp(val, mask) \ -do { \ - __asm__ __volatile__( \ - " .set push \n" \ - " .set noat \n" \ - " move $1, %0 \n" \ - " # wrdsp $1, %x1 \n" \ - " .word 0x7c2004f8 | (%x1 << 11) \n" \ - " .set pop \n" \ - : \ - : "r" (val), "i" (mask)); \ -} while (0) - -#define _dsp_mfxxx(ins) \ -({ \ - unsigned long __treg; \ - \ - __asm__ __volatile__( \ - " .set push \n" \ - " .set noat \n" \ - " .word (0x00000810 | %1) \n" \ - " move %0, $1 \n" \ - " .set pop \n" \ - : "=r" (__treg) \ - : "i" (ins)); \ - __treg; \ -}) - -#define _dsp_mtxxx(val, ins) \ -do { \ - __asm__ __volatile__( \ - " .set push \n" \ - " .set noat \n" \ - " move $1, %0 \n" \ - " .word (0x00200011 | %1) \n" \ - " .set pop \n" \ - : \ - : "r" (val), "i" (ins)); \ -} while (0) #define _dsp_mflo(reg) _dsp_mfxxx((reg << 21) | 0x0002) #define _dsp_mfhi(reg) _dsp_mfxxx((reg << 21) | 0x0000) @@ -2432,6 +2358,8 @@ do { \ #define _dsp_mtlo(val, reg) _dsp_mtxxx(val, ((reg << 11) | 0x0002)) #define _dsp_mthi(val, reg) _dsp_mtxxx(val, ((reg << 11) | 0x0000)) +#endif /* CONFIG_CPU_MICROMIPS */ + #define mflo0() _dsp_mflo(0) #define mflo1() _dsp_mflo(1) #define mflo2() _dsp_mflo(2) @@ -2452,7 +2380,6 @@ do { \ #define mthi2(x) _dsp_mthi(x, 2) #define mthi3(x) _dsp_mthi(x, 3) -#endif /* CONFIG_CPU_MICROMIPS */ #endif /* |