diff options
| -rw-r--r-- | arch/m68k/include/asm/m5206sim.h | 10 | ||||
| -rw-r--r-- | arch/m68k/platform/5206/config.c | 12 |
2 files changed, 12 insertions, 10 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h index 9015eadd5c00..69722366b084 100644 --- a/arch/m68k/include/asm/m5206sim.h +++ b/arch/m68k/include/asm/m5206sim.h @@ -100,11 +100,11 @@ #define MCFDMA_BASE1 (MCF_MBAR + 0x240) /* Base address DMA 1 */ #if defined(CONFIG_NETtel) -#define MCFUART_BASE1 0x180 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x180) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x140) /* Base address UART1 */ #else -#define MCFUART_BASE1 0x140 /* Base address of UART1 */ -#define MCFUART_BASE2 0x180 /* Base address of UART2 */ +#define MCFUART_BASE0 (MCF_MBAR + 0x140) /* Base address UART0 */ +#define MCFUART_BASE1 (MCF_MBAR + 0x180) /* Base address UART1 */ #endif /* @@ -112,6 +112,8 @@ */ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ +#define MCF_IRQ_UART0 73 /* UART0 */ +#define MCF_IRQ_UART1 74 /* UART1 */ /* * Generic GPIO diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index 7826b70b1741..4eec699b3bc9 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -22,12 +22,12 @@ static struct mcf_platform_uart m5206_uart_platform[] = { { - .mapbase = MCF_MBAR + MCFUART_BASE1, - .irq = 73, + .mapbase = MCFUART_BASE0, + .irq = MCF_IRQ_UART0, }, { - .mapbase = MCF_MBAR + MCFUART_BASE2, - .irq = 74, + .mapbase = MCFUART_BASE1, + .irq = MCF_IRQ_UART1, }, { }, }; @@ -48,11 +48,11 @@ static void __init m5206_uart_init_line(int line, int irq) { if (line == 0) { writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE0 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART0); } else if (line == 1) { writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(irq, MCFUART_BASE2 + MCFUART_UIVR); + writeb(irq, MCFUART_BASE1 + MCFUART_UIVR); mcf_mapirq2imr(irq, MCFINTC_UART1); } } |