diff options
| -rw-r--r-- | drivers/gpio/Kconfig | 7 | ||||
| -rw-r--r-- | drivers/gpio/Makefile | 1 | ||||
| -rw-r--r-- | drivers/gpio/twl4030-gpio.c | 521 | ||||
| -rw-r--r-- | drivers/mfd/Makefile | 2 | ||||
| -rw-r--r-- | drivers/mfd/sm501.c | 25 | ||||
| -rw-r--r-- | drivers/mfd/twl4030-core.c | 421 | ||||
| -rw-r--r-- | drivers/mfd/twl4030-irq.c | 743 | ||||
| -rw-r--r-- | drivers/mfd/wm8350-core.c | 5 | ||||
| -rw-r--r-- | drivers/rtc/Kconfig | 10 | ||||
| -rw-r--r-- | drivers/rtc/Makefile | 1 | ||||
| -rw-r--r-- | drivers/rtc/rtc-twl4030.c | 564 | ||||
| -rw-r--r-- | include/linux/i2c/twl4030.h | 28 |
12 files changed, 1897 insertions, 431 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index dbd42d6c93a7..7f2ee27fe76b 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -127,6 +127,13 @@ config GPIO_PCF857X This driver provides an in-kernel interface to those GPIOs using platform-neutral GPIO calls. +config GPIO_TWL4030 + tristate "TWL4030, TWL5030, and TPS659x0 GPIOs" + depends on TWL4030_CORE + help + Say yes here to access the GPIO signals of various multi-function + power management chips from Texas Instruments. + comment "PCI GPIO expanders:" config GPIO_BT8XX diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 01b4bbde1956..6aafdeb9ad03 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_GPIO_MAX732X) += max732x.o obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o obj-$(CONFIG_GPIO_PCA953X) += pca953x.o obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o +obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c new file mode 100644 index 000000000000..37d3eec8730a --- /dev/null +++ b/drivers/gpio/twl4030-gpio.c @@ -0,0 +1,521 @@ +/* + * twl4030_gpio.c -- access to GPIOs on TWL4030/TPS659x0 chips + * + * Copyright (C) 2006-2007 Texas Instruments, Inc. + * Copyright (C) 2006 MontaVista Software, Inc. + * + * Code re-arranged and cleaned up by: + * Syed Mohammed Khasim <x0khasim@ti.com> + * + * Initial Code: + * Andy Lowe / Nishanth Menon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/kthread.h> +#include <linux/irq.h> +#include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/slab.h> + +#include <linux/i2c/twl4030.h> + + +/* + * The GPIO "subchip" supports 18 GPIOs which can be configured as + * inputs or outputs, with pullups or pulldowns on each pin. Each + * GPIO can trigger interrupts on either or both edges. + * + * GPIO interrupts can be fed to either of two IRQ lines; this is + * intended to support multiple hosts. + * + * There are also two LED pins used sometimes as output-only GPIOs. + */ + + +static struct gpio_chip twl_gpiochip; +static int twl4030_gpio_irq_base; + +/* genirq interfaces are not available to modules */ +#ifdef MODULE +#define is_module() true +#else +#define is_module() false +#endif + +/* GPIO_CTRL Fields */ +#define MASK_GPIO_CTRL_GPIO0CD1 BIT(0) +#define MASK_GPIO_CTRL_GPIO1CD2 BIT(1) +#define MASK_GPIO_CTRL_GPIO_ON BIT(2) + +/* Mask for GPIO registers when aggregated into a 32-bit integer */ +#define GPIO_32_MASK 0x0003ffff + +/* Data structures */ +static DEFINE_MUTEX(gpio_lock); + +/* store usage of each GPIO. - each bit represents one GPIO */ +static unsigned int gpio_usage_count; + +/*----------------------------------------------------------------------*/ + +/* + * To configure TWL4030 GPIO module registers + */ +static inline int gpio_twl4030_write(u8 address, u8 data) +{ + return twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, data, address); +} + +/*----------------------------------------------------------------------*/ + +/* + * LED register offsets (use TWL4030_MODULE_{LED,PWMA,PWMB})) + * PWMs A and B are dedicated to LEDs A and B, respectively. + */ + +#define TWL4030_LED_LEDEN 0x0 + +/* LEDEN bits */ +#define LEDEN_LEDAON BIT(0) +#define LEDEN_LEDBON BIT(1) +#define LEDEN_LEDAEXT BIT(2) +#define LEDEN_LEDBEXT BIT(3) +#define LEDEN_LEDAPWM BIT(4) +#define LEDEN_LEDBPWM BIT(5) +#define LEDEN_PWM_LENGTHA BIT(6) +#define LEDEN_PWM_LENGTHB BIT(7) + +#define TWL4030_PWMx_PWMxON 0x0 +#define TWL4030_PWMx_PWMxOFF 0x1 + +#define PWMxON_LENGTH BIT(7) + +/*----------------------------------------------------------------------*/ + +/* + * To read a TWL4030 GPIO module register + */ +static inline int gpio_twl4030_read(u8 address) +{ + u8 data; + int ret = 0; + + ret = twl4030_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address); + return (ret < 0) ? ret : data; +} + +/*----------------------------------------------------------------------*/ + +static u8 cached_leden; /* protected by gpio_lock */ + +/* The LED lines are open drain outputs ... a FET pulls to GND, so an + * external pullup is needed. We could also expose the integrated PWM + * as a LED brightness control; we initialize it as "always on". + */ +static void twl4030_led_set_value(int led, int value) +{ + u8 mask = LEDEN_LEDAON | LEDEN_LEDAPWM; + int status; + + if (led) + mask <<= 1; + + mutex_lock(&gpio_lock); + if (value) + cached_leden &= ~mask; + else + cached_leden |= mask; + status = twl4030_i2c_write_u8(TWL4030_MODULE_LED, cached_leden, + TWL4030_LED_LEDEN); + mutex_unlock(&gpio_lock); +} + +static int twl4030_set_gpio_direction(int gpio, int is_input) +{ + u8 d_bnk = gpio >> 3; + u8 d_msk = BIT(gpio & 0x7); + u8 reg = 0; + u8 base = REG_GPIODATADIR1 + d_bnk; + int ret = 0; + + mutex_lock(&gpio_lock); + ret = gpio_twl4030_read(base); + if (ret >= 0) { + if (is_input) + reg = ret & ~d_msk; + else + reg = ret | d_msk; + + ret = gpio_twl4030_write(base, reg); + } + mutex_unlock(&gpio_lock); + return ret; +} + +static int twl4030_set_gpio_dataout(int gpio, int enable) +{ + u8 d_bnk = gpio >> 3; + u8 d_msk = BIT(gpio & 0x7); + u8 base = 0; + + if (enable) + base = REG_SETGPIODATAOUT1 + d_bnk; + else + base = REG_CLEARGPIODATAOUT1 + d_bnk; + + return gpio_twl4030_write(base, d_msk); +} + +static int twl4030_get_gpio_datain(int gpio) +{ + u8 d_bnk = gpio >> 3; + u8 d_off = gpio & 0x7; + u8 base = 0; + int ret = 0; + + if (unlikely((gpio >= TWL4030_GPIO_MAX) + || !(gpio_usage_count & BIT(gpio)))) + return -EPERM; + + base = REG_GPIODATAIN1 + d_bnk; + ret = gpio_twl4030_read(base); + if (ret > 0) + ret = (ret >> d_off) & 0x1; + + return ret; +} + +/* + * Configure debounce timing value for a GPIO pin on TWL4030 + */ +int twl4030_set_gpio_debounce(int gpio, int enable) +{ + u8 d_bnk = gpio >> 3; + u8 d_msk = BIT(gpio & 0x7); + u8 reg = 0; + u8 base = 0; + int ret = 0; + + if (unlikely((gpio >= TWL4030_GPIO_MAX) + || !(gpio_usage_count & BIT(gpio)))) + return -EPERM; + + base = REG_GPIO_DEBEN1 + d_bnk; + mutex_lock(&gpio_lock); + ret = gpio_twl4030_read(base); + if (ret >= 0) { + if (enable) + reg = ret | d_msk; + else + reg = ret & ~d_msk; + + ret = gpio_twl4030_write(base, reg); + } + mutex_unlock(&gpio_lock); + return ret; +} +EXPORT_SYMBOL(twl4030_set_gpio_debounce); + +/*----------------------------------------------------------------------*/ + +static int twl_request(struct gpio_chip *chip, unsigned offset) +{ + int status = 0; + + mutex_lock(&gpio_lock); + + /* Support the two LED outputs as output-only GPIOs. */ + if (offset >= TWL4030_GPIO_MAX) { + u8 ledclr_mask = LEDEN_LEDAON | LEDEN_LEDAEXT + | LEDEN_LEDAPWM | LEDEN_PWM_LENGTHA; + u8 module = TWL4030_MODULE_PWMA; + + offset -= TWL4030_GPIO_MAX; + if (offset) { + ledclr_mask <<= 1; + module = TWL4030_MODULE_PWMB; + } + + /* initialize PWM to always-drive */ + status = twl4030_i2c_write_u8(module, 0x7f, + TWL4030_PWMx_PWMxOFF); + if (status < 0) + goto done; + status = twl4030_i2c_write_u8(module, 0x7f, + TWL4030_PWMx_PWMxON); + if (status < 0) + goto done; + + /* init LED to not-driven (high) */ + module = TWL4030_MODULE_LED; + status = twl4030_i2c_read_u8(module, &cached_leden, + TWL4030_LED_LEDEN); + if (status < 0) + goto done; + cached_leden &= ~ledclr_mask; + status = twl4030_i2c_write_u8(module, cached_leden, + TWL4030_LED_LEDEN); + if (status < 0) + goto done; + + status = 0; + goto done; + } + + /* on first use, turn GPIO module "on" */ + if (!gpio_usage_count) { + struct twl4030_gpio_platform_data *pdata; + u8 value = MASK_GPIO_CTRL_GPIO_ON; + + /* optionally have the first two GPIOs switch vMMC1 + * and vMMC2 power supplies based on card presence. + */ + pdata = chip->dev->platform_data; + value |= pdata->mmc_cd & 0x03; + + status = gpio_twl4030_write(REG_GPIO_CTRL, value); + } + + if (!status) + gpio_usage_count |= (0x1 << offset); + +done: + mutex_unlock(&gpio_lock); + return status; +} + +static void twl_free(struct gpio_chip *chip, unsigned offset) +{ + if (offset >= TWL4030_GPIO_MAX) { + twl4030_led_set_value(offset - TWL4030_GPIO_MAX, 1); + return; + } + + mutex_lock(&gpio_lock); + + gpio_usage_count &= ~BIT(offset); + + /* on last use, switch off GPIO module */ + if (!gpio_usage_count) + gpio_twl4030_write(REG_GPIO_CTRL, 0x0); + + mutex_unlock(&gpio_lock); +} + +static int twl_direction_in(struct gpio_chip *chip, unsigned offset) +{ + return (offset < TWL4030_GPIO_MAX) + ? twl4030_set_gpio_direction(offset, 1) + : -EINVAL; +} + +static int twl_get(struct gpio_chip *chip, unsigned offset) +{ + int status = 0; + + if (offset < TWL4030_GPIO_MAX) + status = twl4030_get_gpio_datain(offset); + else if (offset == TWL4030_GPIO_MAX) + status = cached_leden & LEDEN_LEDAON; + else + status = cached_leden & LEDEN_LEDBON; + return (status < 0) ? 0 : status; +} + +static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) +{ + if (offset < TWL4030_GPIO_MAX) { + twl4030_set_gpio_dataout(offset, value); + return twl4030_set_gpio_direction(offset, 0); + } else { + twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value); + return 0; + } +} + +static void twl_set(struct gpio_chip *chip, unsigned offset, int value) +{ + if (offset < TWL4030_GPIO_MAX) + twl4030_set_gpio_dataout(offset, value); + else + twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value); +} + +static int twl_to_irq(struct gpio_chip *chip, unsigned offset) +{ + return (twl4030_gpio_irq_base && (offset < TWL4030_GPIO_MAX)) + ? (twl4030_gpio_irq_base + offset) + : -EINVAL; +} + +static struct gpio_chip twl_gpiochip = { + .label = "twl4030", + .owner = THIS_MODULE, + .request = twl_request, + .free = twl_free, + .direction_input = twl_direction_in, + .get = twl_get, + .direction_output = twl_direction_out, + .set = twl_set, + .to_irq = twl_to_irq, + .can_sleep = 1, +}; + +/*----------------------------------------------------------------------*/ + +static int __devinit gpio_twl4030_pulls(u32 ups, u32 downs) +{ + u8 message[6]; + unsigned i, gpio_bit; + + /* For most pins, a pulldown was enabled by default. + * We should have data that's specific to this board. + */ + for (gpio_bit = 1, i = 1; i < 6; i++) { + u8 bit_mask; + unsigned j; + + for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) { + if (ups & gpio_bit) + bit_mask |= 1 << (j + 1); + else if (downs & gpio_bit) + bit_mask |= 1 << (j + 0); + } + message[i] = bit_mask; + } + + return twl4030_i2c_write(TWL4030_MODULE_GPIO, message, + REG_GPIOPUPDCTR1, 5); +} + +static int gpio_twl4030_remove(struct platform_device *pdev); + +static int __devinit gpio_twl4030_probe(struct platform_device *pdev) +{ + struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; + int ret; + + /* maybe setup IRQs */ + if (pdata->irq_base) { + if (is_module()) { + dev_err(&pdev->dev, + "can't dispatch IRQs from modules\n"); + goto no_irqs; + } + ret = twl4030_sih_setup(TWL4030_MODULE_GPIO); + if (ret < 0) + return ret; + WARN_ON(ret != pdata->irq_base); + twl4030_gpio_irq_base = ret; + } + +no_irqs: + /* + * NOTE: boards may waste power if they don't set pullups + * and pulldowns correctly ... default for non-ULPI pins is + * pulldown, and some other pins may have external pullups + * or pulldowns. Careful! + */ + ret = gpio_twl4030_pulls(pdata->pullups, pdata->pulldowns); + if (ret) + dev_dbg(&pdev->dev, "pullups %.05x %.05x --> %d\n", + pdata->pullups, pdata->pulldowns, + ret); + + twl_gpiochip.base = pdata->gpio_base; + twl_gpiochip.ngpio = TWL4030_GPIO_MAX; + twl_gpiochip.dev = &pdev->dev; + + /* NOTE: we assume VIBRA_CTL.VIBRA_EN, in MODULE_AUDIO_VOICE, + * is (still) clear if use_leds is set. + */ + if (pdata->use_leds) + twl_gpiochip.ngpio += 2; + + ret = gpiochip_add(&twl_gpiochip); + if (ret < 0) { + dev_err(&pdev->dev, + "could not register gpiochip, %d\n", + ret); + twl_gpiochip.ngpio = 0; + gpio_twl4030_remove(pdev); + } else if (pdata->setup) { + int status; + + status = pdata->setup(&pdev->dev, + pdata->gpio_base, TWL4030_GPIO_MAX); + if (status) + dev_dbg(&pdev->dev, "setup --> %d\n", status); + } + + return ret; +} + +static int __devexit gpio_twl4030_remove(struct platform_device *pdev) +{ + struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; + int status; + + if (pdata->teardown) { + status = pdata->teardown(&pdev->dev, + pdata->gpio_base, TWL4030_GPIO_MAX); + if (status) { + dev_dbg(&pdev->dev, "teardown --> %d\n", status); + return status; + } + } + + status = gpiochip_remove(&twl_gpiochip); + if (status < 0) + return status; + + if (is_module()) + return 0; + + /* REVISIT no support yet for deregistering all the IRQs */ + WARN_ON(1); + return -EIO; +} + +/* Note: this hardware lives inside an I2C-based multi-function device. */ +MODULE_ALIAS("platform:twl4030_gpio"); + +static struct platform_driver gpio_twl4030_driver = { + .driver.name = "twl4030_gpio", + .driver.owner = THIS_MODULE, + .probe = gpio_twl4030_probe, + .remove = __devexit_p(gpio_twl4030_remove), +}; + +static int __init gpio_twl4030_init(void) +{ + return platform_driver_register(&gpio_twl4030_driver); +} +subsys_initcall(gpio_twl4030_init); + +static void __exit gpio_twl4030_exit(void) +{ + platform_driver_unregister(&gpio_twl4030_driver); +} +module_exit(gpio_twl4030_exit); + +MODULE_AUTHOR("Texas Instruments, Inc."); +MODULE_DESCRIPTION("GPIO interface for TWL4030"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 68e237b830ad..0acefe8aff87 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -17,7 +17,7 @@ wm8350-objs := wm8350-core.o wm8350-regmap.o wm8350-gpio.o obj-$(CONFIG_MFD_WM8350) += wm8350.o obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o -obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o +obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o obj-$(CONFIG_MFD_CORE) += mfd-core.o diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index 220e4371266b..170f9d47c2f9 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -1374,31 +1374,31 @@ static int sm501_init_dev(struct sm501_devdata *sm) static int sm501_plat_probe(struct platform_device *dev) { struct sm501_devdata *sm; - int err; + int ret; sm = kzalloc(sizeof(struct sm501_devdata), GFP_KERNEL); if (sm == NULL) { dev_err(&dev->dev, "no memory for device data\n"); - err = -ENOMEM; + ret = -ENOMEM; goto err1; } sm->dev = &dev->dev; sm->pdev_id = dev->id; - sm->irq = platform_get_irq(dev, 0); - sm->io_res = platform_get_resource(dev, IORESOURCE_MEM, 1); - sm->mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0); sm->platdata = dev->dev.platform_data; - if (sm->irq < 0) { + ret = platform_get_irq(dev, 0); + if (ret < 0) { dev_err(&dev->dev, "failed to get irq resource\n"); - err = sm->irq; goto err_res; } + sm->irq = ret; + sm->io_res = platform_get_resource(dev, IORESOURCE_MEM, 1); + sm->mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0); if (sm->io_res == NULL || sm->mem_res == NULL) { dev_err(&dev->dev, "failed to get IO resource\n"); - err = -ENOENT; + ret = -ENOENT; goto err_res; } @@ -1407,7 +1407,7 @@ static int sm501_plat_probe(struct platform_device *dev) if (sm->regs_claim == NULL) { dev_err(&dev->dev, "cannot claim registers\n"); - err= -EBUSY; + ret = -EBUSY; goto err_res; } @@ -1418,7 +1418,7 @@ static int sm501_plat_probe(struct platform_device *dev) if (sm->regs == NULL) { dev_err(&dev->dev, "cannot remap registers\n"); - err = -EIO; + ret = -EIO; goto err_claim; } @@ -1430,7 +1430,7 @@ static int sm501_plat_probe(struct platform_device *dev) err_res: kfree(sm); err1: - return err; + return ret; } @@ -1625,8 +1625,7 @@ static int sm501_pci_probe(struct pci_dev *dev, goto err3; } - sm->regs = ioremap(pci_resource_start(dev, 1), - pci_resource_len(dev, 1)); + sm->regs = pci_ioremap_bar(dev, 1); if (sm->regs == NULL) { dev_err(&dev->dev, "cannot remap registers\n"); diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c index fd9a0160202c..dd843c4fbcc7 100644 --- a/drivers/mfd/twl4030-core.c +++ b/drivers/mfd/twl4030-core.c @@ -27,15 +27,11 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <linux/kernel_stat.h> #include <linux/init.h> #include <linux/mutex.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/random.h> -#include <linux/kthread.h> #include <linux/platform_device.h> #include <linux/clk.h> +#include <linux/err.h> #include <linux/i2c.h> #include <linux/i2c/twl4030.h> @@ -93,26 +89,6 @@ #define twl_has_usb() false #endif -static inline void activate_irq(int irq) -{ -#ifdef CONFIG_ARM - /* ARM requires an extra step to clear IRQ_NOREQUEST, which it - * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE. - */ - set_irq_flags(irq, IRQF_VALID); -#else - /* same effect on other architectures */ - set_irq_noprobe(irq); -#endif -} - -/* Primary Interrupt Handler on TWL4030 Registers */ - -/* Register Definitions */ - -#define REG_PIH_ISR_P1 (0x1) -#define REG_PIH_ISR_P2 (0x2) -#define REG_PIH_SIR (0x3) /* Triton Core internal information (BEGIN) */ @@ -175,138 +151,6 @@ static inline void activate_irq(int irq) /*----------------------------------------------------------------------*/ -/** - * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init - * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO) - * @sih_ctrl: address of module SIH_CTRL register - * @reg_cnt: number of IMR/ISR regs - * @imrs: pointer to array of TWL module interrupt mask register indices - * @isrs: pointer to array of TWL module interrupt status register indices - * - * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear - * during twl_init_irq(). - */ -struct twl4030_mod_iregs { - const u8 mod_no; - const u8 sih_ctrl; - const u8 reg_cnt; - const u8 *imrs; - const u8 *isrs; -}; - -/* TWL4030 INT module interrupt mask registers */ -static const u8 __initconst twl4030_int_imr_regs[] = { - TWL4030_INT_PWR_IMR1, - TWL4030_INT_PWR_IMR2, -}; - -/* TWL4030 INT module interrupt status registers */ -static const u8 __initconst twl4030_int_isr_regs[] = { - TWL4030_INT_PWR_ISR1, - TWL4030_INT_PWR_ISR2, -}; - -/* TWL4030 INTERRUPTS module interrupt mask registers */ -static const u8 __initconst twl4030_interrupts_imr_regs[] = { - TWL4030_INTERRUPTS_BCIIMR1A, - TWL4030_INTERRUPTS_BCIIMR1B, - TWL4030_INTERRUPTS_BCIIMR2A, - TWL4030_INTERRUPTS_BCIIMR2B, -}; - -/* TWL4030 INTERRUPTS module interrupt status registers */ -static const u8 __initconst twl4030_interrupts_isr_regs[] = { - TWL4030_INTERRUPTS_BCIISR1A, - TWL4030_INTERRUPTS_BCIISR1B, - TWL4030_INTERRUPTS_BCIISR2A, - TWL4030_INTERRUPTS_BCIISR2B, -}; - -/* TWL4030 MADC module interrupt mask registers */ -static const u8 __initconst twl4030_madc_imr_regs[] = { - TWL4030_MADC_IMR1, - TWL4030_MADC_IMR2, -}; - -/* TWL4030 MADC module interrupt status registers */ -static const u8 __initconst twl4030_madc_isr_regs[] = { - TWL4030_MADC_ISR1, - TWL4030_MADC_ISR2, -}; - -/* TWL4030 keypad module interrupt mask registers */ -static const u8 __initconst twl4030_keypad_imr_regs[] = { - TWL4030_KEYPAD_KEYP_IMR1, - TWL4030_KEYPAD_KEYP_IMR2, -}; - -/* TWL4030 keypad module interrupt status registers */ -static const u8 __initconst twl4030_keypad_isr_regs[] = { - TWL4030_KEYPAD_KEYP_ISR1, - TWL4030_KEYPAD_KEYP_ISR2, -}; - -/* TWL4030 GPIO module interrupt mask registers */ -static const u8 __initconst twl4030_gpio_imr_regs[] = { - REG_GPIO_IMR1A, - REG_GPIO_IMR1B, - REG_GPIO_IMR2A, - REG_GPIO_IMR2B, - REG_GPIO_IMR3A, - REG_GPIO_IMR3B, -}; - -/* TWL4030 GPIO module interrupt status registers */ -static const u8 __initconst twl4030_gpio_isr_regs[] = { - REG_GPIO_ISR1A, - REG_GPIO_ISR1B, - REG_GPIO_ISR2A, - REG_GPIO_ISR2B, - REG_GPIO_ISR3A, - REG_GPIO_ISR3B, -}; - -/* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */ -static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = { - { - .mod_no = TWL4030_MODULE_INT, - .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL, - .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs), - .imrs = twl4030_int_imr_regs, - .isrs = twl4030_int_isr_regs, - }, - { - .mod_no = TWL4030_MODULE_INTERRUPTS, - .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL, - .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs), - .imrs = twl4030_interrupts_imr_regs, - .isrs = twl4030_interrupts_isr_regs, - }, - { - .mod_no = TWL4030_MODULE_MADC, - .sih_ctrl = TWL4030_MADC_SIH_CTRL, - .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs), - .imrs = twl4030_madc_imr_regs, - .isrs = twl4030_madc_isr_regs, - }, - { - .mod_no = TWL4030_MODULE_KEYPAD, - .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL, - .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs), - .imrs = twl4030_keypad_imr_regs, - .isrs = twl4030_keypad_isr_regs, - }, - { - .mod_no = TWL4030_MODULE_GPIO, - .sih_ctrl = REG_GPIO_SIH_CTRL, - .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs), - .imrs = twl4030_gpio_imr_regs, - .isrs = twl4030_gpio_isr_regs, - }, -}; - -/*----------------------------------------------------------------*/ - /* is driver active, bound to a chip? */ static bool inuse; @@ -367,33 +211,6 @@ static struct twl4030mapping twl4030_map[TWL4030_MODULE_LAST + 1] = { /*----------------------------------------------------------------------*/ -/* - * TWL4030 doesn't have PIH mask, hence dummy function for mask - * and unmask of the (eight) interrupts reported at that level ... - * masking is only available from SIH (secondary) modules. - */ - -static void twl4030_i2c_ackirq(unsigned int irq) -{ -} - -static void twl4030_i2c_disableint(unsigned int irq) -{ -} - -static void twl4030_i2c_enableint(unsigned int irq) -{ -} - -static struct irq_chip twl4030_irq_chip = { - .name = "twl4030", - .ack = twl4030_i2c_ackirq, - .mask = twl4030_i2c_disableint, - .unmask = twl4030_i2c_enableint, -}; - -/*----------------------------------------------------------------------*/ - /* Exported Functions */ /** @@ -535,108 +352,11 @@ EXPORT_SYMBOL(twl4030_i2c_read_u8); /*----------------------------------------------------------------------*/ -static unsigned twl4030_irq_base; - -static struct completion irq_event; - -/* - * This thread processes interrupts reported by the Primary Interrupt Handler. - */ -static int twl4030_irq_thread(void *data) -{ - long irq = (long)data; - irq_desc_t *desc = irq_desc + irq; - static unsigned i2c_errors; - const static unsigned max_i2c_errors = 100; - - current->flags |= PF_NOFREEZE; - - while (!kthread_should_stop()) { - int ret; - int module_irq; - u8 pih_isr; - - /* Wait for IRQ, then read PIH irq status (also blocking) */ - wait_for_completion_interruptible(&irq_event); - - ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr, - REG_PIH_ISR_P1); - if (ret) { - pr_warning("%s: I2C error %d reading PIH ISR\n", - DRIVER_NAME, ret); - if (++i2c_errors >= max_i2c_errors) { - printk(KERN_ERR "Maximum I2C error count" - " exceeded. Terminating %s.\n", - __func__); - break; - } - complete(&irq_event); - continue; - } - - /* these handlers deal with the relevant SIH irq status */ - local_irq_disable(); - for (module_irq = twl4030_irq_base; - pih_isr; - pih_isr >>= 1, module_irq++) { - if (pih_isr & 0x1) { - irq_desc_t *d = irq_desc + module_irq; - - d->handle_irq(module_irq, d); - } - } - local_irq_enable(); - - desc->chip->unmask(irq); - } - - return 0; -} - /* - * do_twl4030_irq() is the desc->handle method for the twl4030 interrupt. - * This is a chained interrupt, so there is no desc->action method for it. - * Now we need to query the interrupt controller in the twl4030 to determine - * which module is generating the interrupt request. However, we can't do i2c - * transactions in interrupt context, so we must defer that work to a kernel - * thread. All we do here is acknowledge and mask the interrupt and wakeup - * the kernel thread. + * NOTE: We know the first 8 IRQs after pdata->base_irq are + * for the PIH, and the next are for the PWR_INT SIH, since + * that's how twl_init_irq() sets things up. */ -static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc) -{ - const unsigned int cpu = smp_processor_id(); - - /* - * Earlier this was desc->triggered = 1; - */ - desc->status |= IRQ_LEVEL; - - /* - * Acknowledge, clear _AND_ disable the interrupt. - */ - desc->chip->ack(irq); - - if (!desc->depth) { - kstat_cpu(cpu).irqs[irq]++; - - complete(&irq_event); - } -} - -static struct task_struct * __init start_twl4030_irq_thread(long irq) -{ - struct task_struct *thread; - - init_completion(&irq_event); - thread = kthread_run(twl4030_irq_thread, (void *)irq, "twl4030-irq"); - if (!thread) - pr_err("%s: could not create twl4030 irq %ld thread!\n", - DRIVER_NAME, irq); - - return thread; -} - -/*----------------------------------------------------------------------*/ static int add_children(struct twl4030_platform_data *pdata) { @@ -668,7 +388,7 @@ static int add_children(struct twl4030_platform_data *pdata) if (status == 0) { struct resource r = { - .start = TWL4030_PWRIRQ_CHG_PRES, + .start = pdata->irq_base + 8 + 1, .flags = IORESOURCE_IRQ, }; @@ -817,8 +537,7 @@ static int add_children(struct twl4030_platform_data *pdata) /* RTC module IRQ */ if (status == 0) { struct resource r = { - /* REVISIT don't hard-wire this stuff */ - .start = TWL4030_PWRIRQ_RTC, + .start = pdata->irq_base + 8 + 3, .flags = IORESOURCE_IRQ, }; @@ -863,7 +582,7 @@ static int add_children(struct twl4030_platform_data *pdata) if (status == 0) { struct resource r = { - .start = TWL4030_PWRIRQ_USB_PRES, + .start = pdata->irq_base + 8 + 2, .flags = IORESOURCE_IRQ, }; @@ -965,123 +684,17 @@ static void __init clocks_init(void) /*----------------------------------------------------------------------*/ -/** - * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write - * @mod_no: TWL4030 module number - * @reg: register index to clear - * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0) - * - * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt - * status register to ensure that any prior interrupts are cleared. - * Returns the status from the I2C read operation. - */ -static int __init twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor) -{ - u8 tmp; - - return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) : - twl4030_i2c_write_u8(mod_no, 0xff, reg); -} - -/** - * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes? - * @mod_no: TWL4030 module number - * @reg: register index to clear - * - * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for - * the specified TWL module are cleared by reads, or 0 if cleared by - * writes. - */ -static int twl4030_read_cor_bit(u8 mod_no, u8 reg) -{ - u8 tmp = 0; - - WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0); - - tmp &= TWL4030_SIH_CTRL_COR_MASK; - tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK); - - return tmp; -} - -/** - * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts - * @t: pointer to twl4030_mod_iregs array - * @t_sz: ARRAY_SIZE(t) (starting at 1) - * - * Mask all TWL4030 interrupt mask registers (IMRs) and clear all - * interrupt status registers (ISRs). No return value, but will WARN if - * any I2C operations fail. - */ -static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t, - const u8 t_sz) -{ - int i, j; - - /* - * N.B. - further efficiency is possible here. Eight I2C - * operations on BCI and GPIO modules are avoidable if I2C - * burst read/write transactions were implemented. Would - * probably save about 1ms of boot time and a small amount of - * power. - */ - for (i = 0; i < t_sz; i++) { - const struct twl4030_mod_iregs tmr = t[i]; - int cor; - - /* Are ISRs cleared by reads or writes? */ - cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl); - - for (j = 0; j < tmr.reg_cnt; j++) { - - /* Mask interrupts at the TWL4030 */ - WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff, - tmr.imrs[j]) < 0); - - /* Clear TWL4030 ISRs */ - WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no, - tmr.isrs[j], cor) < 0); - } - } -} - - -static void twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end) -{ - int i; - - /* - * Mask and clear all TWL4030 interrupts since initially we do - * not have any TWL4030 module interrupt handlers present - */ - twl4030_mask_clear_intrs(twl4030_mod_regs, - ARRAY_SIZE(twl4030_mod_regs)); - - twl4030_irq_base = irq_base; - - /* install an irq handler for each of the PIH modules */ - for (i = irq_base; i < irq_end; i++) { - set_irq_chip_and_handler(i, &twl4030_irq_chip, - handle_simple_irq); - activate_irq(i); - } - - /* install an irq handler to demultiplex the TWL4030 interrupt */ - set_irq_data(irq_num, start_twl4030_irq_thread(irq_num)); - set_irq_chained_handler(irq_num, do_twl4030_irq); -} - -/*----------------------------------------------------------------------*/ +int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end); +int twl_exit_irq(void); static int twl4030_remove(struct i2c_client *client) { unsigned i; + int status; - /* FIXME undo twl_init_irq() */ - if (twl4030_irq_base) { - dev_err(&client->dev, "can't yet clean up IRQs?\n"); - return -ENOSYS; - } + status = twl_exit_irq(); + if (status < 0) + return status; for (i = 0; i < TWL4030_NUM_SLAVES; i++) { struct twl4030_client *twl = &twl4030_modules[i]; @@ -1112,7 +725,7 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) return -EIO; } - if (inuse || twl4030_irq_base) { + if (inuse) { dev_dbg(&client->dev, "driver is already in use\n"); return -EBUSY; } @@ -1146,9 +759,9 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) if (client->irq && pdata->irq_base && pdata->irq_end > pdata->irq_base) { - twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end); - dev_info(&client->dev, "IRQ %d chains IRQs %d..%d\n", - client->irq, pdata->irq_base, pdata->irq_end - 1); + status = twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end); + if (status < 0) + goto fail; } status = add_children(pdata); diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c new file mode 100644 index 000000000000..fae868a8d499 --- /dev/null +++ b/drivers/mfd/twl4030-irq.c @@ -0,0 +1,743 @@ +/* + * twl4030-irq.c - TWL4030/TPS659x0 irq support + * + * Copyright (C) 2005-2006 Texas Instruments, Inc. + * + * Modifications to defer interrupt handling to a kernel thread: + * Copyright (C) 2006 MontaVista Software, Inc. + * + * Based on tlv320aic23.c: + * Copyright (c) by Kai Svahn <kai.svahn@nokia.com> + * + * Code cleanup and modifications to IRQ handler. + * by syed khasim <x0khasim@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/kthread.h> + +#include <linux/i2c/twl4030.h> + + +/* + * TWL4030 IRQ handling has two stages in hardware, and thus in software. + * The Primary Interrupt Handler (PIH) stage exposes status bits saying + * which Secondary Interrupt Handler (SIH) stage is raising an interrupt. + * SIH modules are more traditional IRQ components, which support per-IRQ + * enable/disable and trigger controls; they do most of the work. + * + * These chips are designed to support IRQ handling from two different + * I2C masters. Each has a dedicated IRQ line, and dedicated IRQ status + * and mask registers in the PIH and SIH modules. + * + * We set up IRQs starting at a platform-specified base, always starting + * with PIH and the SIH for PWR_INT and then usually adding GPIO: + * base + 0 .. base + 7 PIH + * base + 8 .. base + 15 SIH for PWR_INT + * base + 16 .. base + 33 SIH for GPIO + */ + +/* PIH register offsets */ +#define REG_PIH_ISR_P1 0x01 +#define REG_PIH_ISR_P2 0x02 +#define REG_PIH_SIR 0x03 /* for testing */ + + +/* Linux could (eventually) use either IRQ line */ +static int irq_line; + +struct sih { + char name[8]; + u8 module; /* module id */ + u8 control_offset; /* for SIH_CTRL */ + bool set_cor; + + u8 bits; /* valid in isr/imr */ + u8 bytes_ixr; /* bytelen of ISR/IMR/SIR */ + + u8 edr_offset; + u8 bytes_edr; /* bytelen of EDR */ + + /* SIR ignored -- set interrupt, for testing only */ + struct irq_data { + u8 isr_offset; + u8 imr_offset; + } mask[2]; + /* + 2 bytes padding */ +}; + +#define SIH_INITIALIZER(modname, nbits) \ + .module = TWL4030_MODULE_ ## modname, \ + .control_offset = TWL4030_ ## modname ## _SIH_CTRL, \ + .bits = nbits, \ + .bytes_ixr = DIV_ROUND_UP(nbits, 8), \ + .edr_offset = TWL4030_ ## modname ## _EDR, \ + .bytes_edr = DIV_ROUND_UP((2*(nbits)), 8), \ + .mask = { { \ + .isr_offset = TWL4030_ ## modname ## _ISR1, \ + .imr_offset = TWL4030_ ## modname ## _IMR1, \ + }, \ + { \ + .isr_offset = TWL4030_ ## modname ## _ISR2, \ + .imr_offset = TWL4030_ ## modname ## _IMR2, \ + }, }, + +/* register naming policies are inconsistent ... */ +#define TWL4030_INT_PWR_EDR TWL4030_INT_PWR_EDR1 +#define TWL4030_MODULE_KEYPAD_KEYP TWL4030_MODULE_KEYPAD +#define TWL4030_MODULE_INT_PWR TWL4030_MODULE_INT + + +/* Order in this table matches order in PIH_ISR. That is, + * BIT(n) in PIH_ISR is sih_modules[n]. + */ +static const struct sih sih_modules[6] = { + [0] = { + .name = "gpio", + .module = TWL4030_MODULE_GPIO, + .control_offset = REG_GPIO_SIH_CTRL, + .set_cor = true, + .bits = TWL4030_GPIO_MAX, + .bytes_ixr = 3, + /* Note: *all* of these IRQs default to no-trigger */ + .edr_offset = REG_GPIO_EDR1, + .bytes_edr = 5, + .mask = { { + .isr_offset = REG_GPIO_ISR1A, + .imr_offset = REG_GPIO_IMR1A, + }, { + .isr_offset = REG_GPIO_ISR1B, + .imr_offset = REG_GPIO_IMR1B, + }, }, + }, + [1] = { + .name = "keypad", + .set_cor = true, + SIH_INITIALIZER(KEYPAD_KEYP, 4) + }, + [2] = { + .name = "bci", + .module = TWL4030_MODULE_INTERRUPTS, + .control_offset = TWL4030_INTERRUPTS_BCISIHCTRL, + .bits = 12, + .bytes_ixr = 2, + .edr_offset = TWL4030_INTERRUPTS_BCIEDR1, + /* Note: most of these IRQs default to no-trigger */ + .bytes_edr = 3, + .mask = { { + .isr_offset = TWL4030_INTERRUPTS_BCIISR1A, + .imr_offset = TWL4030_INTERRUPTS_BCIIMR1A, + }, { + .isr_offset = TWL4030_INTERRUPTS_BCIISR1B, + .imr_offset = TWL4030_INTERRUPTS_BCIIMR1B, + }, }, + }, + [3] = { + .name = "madc", + SIH_INITIALIZER(MADC, 4) + }, + [4] = { + /* USB doesn't use the same SIH organization */ + .name = "usb", + }, + [5] = { + .name = "power", + .set_cor = true, + SIH_INITIALIZER(INT_PWR, 8) + }, + /* there are no SIH modules #6 or #7 ... */ +}; + +#undef TWL4030_MODULE_KEYPAD_KEYP +#undef TWL4030_MODULE_INT_PWR +#undef TWL4030_INT_PWR_EDR + +/*----------------------------------------------------------------------*/ + +static unsigned twl4030_irq_base; + +static struct completion irq_event; + +/* + * This thread processes interrupts reported by the Primary Interrupt Handler. + */ +static int twl4030_irq_thread(void *data) +{ + long irq = (long)data; + irq_desc_t *desc = irq_desc + irq; + static unsigned i2c_errors; + const static unsigned max_i2c_errors = 100; + + current->flags |= PF_NOFREEZE; + + while (!kthread_should_stop()) { + int ret; + int module_irq; + u8 pih_isr; + + /* Wait for IRQ, then read PIH irq status (also blocking) */ + wait_for_completion_interruptible(&irq_event); + + ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr, + REG_PIH_ISR_P1); + if (ret) { + pr_warning("twl4030: I2C error %d reading PIH ISR\n", + ret); + if (++i2c_errors >= max_i2c_errors) { + printk(KERN_ERR "Maximum I2C error count" + " exceeded. Terminating %s.\n", + __func__); + break; + } + complete(&irq_event); + continue; + } + + /* these handlers deal with the relevant SIH irq status */ + local_irq_disable(); + for (module_irq = twl4030_irq_base; + pih_isr; + pih_isr >>= 1, module_irq++) { + if (pih_isr & 0x1) { + irq_desc_t *d = irq_desc + module_irq; + + /* These can't be masked ... always warn + * if we get any surprises. + */ + if (d->status & IRQ_DISABLED) + note_interrupt(module_irq, d, + IRQ_NONE); + else + d->handle_irq(module_irq, d); + } + } + local_irq_enable(); + + desc->chip->unmask(irq); + } + + return 0; +} + +/* + * handle_twl4030_pih() is the desc->handle method for the twl4030 interrupt. + * This is a chained interrupt, so there is no desc->action method for it. + * Now we need to query the interrupt controller in the twl4030 to determine + * which module is generating the interrupt request. However, we can't do i2c + * transactions in interrupt context, so we must defer that work to a kernel + * thread. All we do here is acknowledge and mask the interrupt and wakeup + * the kernel thread. + */ +static void handle_twl4030_pih(unsigned int irq, irq_desc_t *desc) +{ + /* Acknowledge, clear *AND* mask the interrupt... */ + desc->chip->ack(irq); + complete(&irq_event); +} + +static struct task_struct *start_twl4030_irq_thread(long irq) +{ + struct task_struct *thread; + + init_completion(&irq_event); + thread = kthread_run(twl4030_irq_thread, (void *)irq, "twl4030-irq"); + if (!thread) + pr_err("twl4030: could not create irq %ld thread!\n", irq); + + return thread; +} + +/*----------------------------------------------------------------------*/ + +/* + * twl4030_init_sih_modules() ... start from a known state where no + * IRQs will be coming in, and where we can quickly enable them then + * handle them as they arrive. Mask all IRQs: maybe init SIH_CTRL. + * + * NOTE: we don't touch EDR registers here; they stay with hardware + * defaults or whatever the last value was. Note that when both EDR + * bits for an IRQ are clear, that's as if its IMR bit is set... + */ +static int twl4030_init_sih_modules(unsigned line) +{ + const struct sih *sih; + u8 buf[4]; + int i; + int status; + + /* line 0 == int1_n signal; line 1 == int2_n signal */ + if (line > 1) + return -EINVAL; + + irq_line = line; + + /* disable all interrupts on our line */ + memset(buf, 0xff, sizeof buf); + sih = sih_modules; + for (i = 0; i < ARRAY_SIZE(sih_modules); i++, sih++) { + + /* skip USB -- it's funky */ + if (!sih->bytes_ixr) + continue; + + status = twl4030_i2c_write(sih->module, buf, + sih->mask[line].imr_offset, sih->bytes_ixr); + if (status < 0) + pr_err("twl4030: err %d initializing %s %s\n", + status, sih->name, "IMR"); + + /* Maybe disable "exclusive" mode; buffer second pending irq; + * set Clear-On-Read (COR) bit. + * + * NOTE that sometimes COR polarity is documented as being + * inverted: for MADC and BCI, COR=1 means "clear on write". + * And for PWR_INT it's not documented... + */ + if (sih->set_cor) { + status = twl4030_i2c_write_u8(sih->module, + TWL4030_SIH_CTRL_COR_MASK, + sih->control_offset); + if (status < 0) + pr_err("twl4030: err %d initializing %s %s\n", + status, sih->name, "SIH_CTRL"); + } + } + + sih = sih_modules; + for (i = 0; i < ARRAY_SIZE(sih_modules); i++, sih++) { + u8 rxbuf[4]; + int j; + + /* skip USB */ + if (!sih->bytes_ixr) + continue; + + /* Clear pending interrupt status. Either the read was + * enough, or we need to write those bits. Repeat, in + * case an IRQ is pending (PENDDIS=0) ... that's not + * uncommon with PWR_INT.PWRON. + */ + for (j = 0; j < 2; j++) { + status = twl4030_i2c_read(sih->module, rxbuf, + sih->mask[line].isr_offset, sih->bytes_ixr); + if (status < 0) + pr_err("twl4030: err %d initializing %s %s\n", + status, sih->name, "ISR"); + + if (!sih->set_cor) + status = twl4030_i2c_write(sih->module, buf, + sih->mask[line].isr_offset, + sih->bytes_ixr); + /* else COR=1 means read sufficed. + * (for most SIH modules...) + */ + } + } + + return 0; +} + +static inline void activate_irq(int irq) +{ +#ifdef CONFIG_ARM + /* ARM requires an extra step to clear IRQ_NOREQUEST, which it + * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE. + */ + set_irq_flags(irq, IRQF_VALID); +#else + /* same effect on other architectures */ + set_irq_noprobe(irq); +#endif +} + +/*----------------------------------------------------------------------*/ + +static DEFINE_SPINLOCK(sih_agent_lock); + +static struct workqueue_struct *wq; + +struct sih_agent { + int irq_base; + const struct sih *sih; + + u32 imr; + bool imr_change_pending; + struct work_struct mask_work; + + u32 edge_change; + struct work_struct edge_work; +}; + +static void twl4030_sih_do_mask(struct work_struct *work) +{ + struct sih_agent *agent; + const struct sih *sih; + union { + u8 bytes[4]; + u32 word; + } imr; + int status; + + agent = container_of(work, struct sih_agent, mask_work); + + /* see what work we have */ + spin_lock_irq(&sih_agent_lock); + if (agent->imr_change_pending) { + sih = agent->sih; + /* byte[0] gets overwritten as we write ... */ + imr.word = cpu_to_le32(agent->imr << 8); + agent->imr_change_pending = false; + } else + sih = NULL; + spin_unlock_irq(&sih_agent_lock); + if (!sih) + return; + + /* write the whole mask ... simpler than subsetting it */ + status = twl4030_i2c_write(sih->module, imr.bytes, + sih->mask[irq_line].imr_offset, sih->bytes_ixr); + if (status) + pr_err("twl4030: %s, %s --> %d\n", __func__, + "write", status); +} + +static void twl4030_sih_do_edge(struct work_struct *work) +{ + struct sih_agent *agent; + const struct sih *sih; + u8 bytes[6]; + u32 edge_change; + int status; + + agent = container_of(work, struct sih_agent, edge_work); + + /* see what work we have */ + spin_lock_irq(&sih_agent_lock); + edge_change = agent->edge_change; + agent->edge_change = 0;; + sih = edge_change ? agent->sih : NULL; + spin_unlock_irq(&sih_agent_lock); + if (!sih) + return; + + /* Read, reserving first byte for write scratch. Yes, this + * could be cached for some speedup ... but be careful about + * any processor on the other IRQ line, EDR registers are + * shared. + */ + status = twl4030_i2c_read(sih->module, bytes + 1, + sih->edr_offset, sih->bytes_edr); + if (status) { + pr_err("twl4030: %s, %s --> %d\n", __func__, + "read", status); + return; + } + + /* Modify only the bits we know must change */ + while (edge_change) { + int i = fls(edge_change) - 1; + struct irq_desc *d = irq_desc + i + agent->irq_base; + int byte = 1 + (i >> 2); + int off = (i & 0x3) * 2; + + bytes[byte] &= ~(0x03 << off); + + spin_lock_irq(&d->lock); + if (d->status & IRQ_TYPE_EDGE_RISING) + bytes[byte] |= BIT(off + 1); + if (d->status & IRQ_TYPE_EDGE_FALLING) + bytes[byte] |= BIT(off + 0); + spin_unlock_irq(&d->lock); + + edge_change &= ~BIT(i); + } + + /* Write */ + status = twl4030_i2c_write(sih->module, bytes, + sih->edr_offset, sih->bytes_edr); + if (status) + pr_err("twl4030: %s, %s --> %d\n", __func__, + "write", status); +} + +/*----------------------------------------------------------------------*/ + +/* + * All irq_chip methods get issued from code holding irq_desc[irq].lock, + * which can't perform the underlying I2C operations (because they sleep). + * So we must hand them off to a thread (workqueue) and cope with asynch + * completion, potentially including some re-ordering, of these requests. + */ + +static void twl4030_sih_mask(unsigned irq) +{ + struct sih_agent *sih = get_irq_chip_data(irq); + unsigned long flags; + + spin_lock_irqsave(&sih_agent_lock, flags); + sih->imr |= BIT(irq - sih->irq_base); + sih->imr_change_pending = true; + queue_work(wq, &sih->mask_work); + spin_unlock_irqrestore(&sih_agent_lock, flags); +} + +static void twl4030_sih_unmask(unsigned irq) +{ + struct sih_agent *sih = get_irq_chip_data(irq); + unsigned long flags; + + spin_lock_irqsave(&sih_agent_lock, flags); + sih->imr &= ~BIT(irq - sih->irq_base); + sih->imr_change_pending = true; + queue_work(wq, &sih->mask_work); + spin_unlock_irqrestore(&sih_agent_lock, flags); +} + +static int twl4030_sih_set_type(unsigned irq, unsigned trigger) +{ + struct sih_agent *sih = get_irq_chip_data(irq); + struct irq_desc *desc = irq_desc + irq; + unsigned long flags; + + if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) + return -EINVAL; + + spin_lock_irqsave(&sih_agent_lock, flags); + if ((desc->status & IRQ_TYPE_SENSE_MASK) != trigger) { + desc->status &= ~IRQ_TYPE_SENSE_MASK; + desc->status |= trigger; + sih->edge_change |= BIT(irq - sih->irq_base); + queue_work(wq, &sih->edge_work); + } + spin_unlock_irqrestore(&sih_agent_lock, flags); + return 0; +} + +static struct irq_chip twl4030_sih_irq_chip = { + .name = "twl4030", + .mask = twl4030_sih_mask, + .unmask = twl4030_sih_unmask, + .set_type = twl4030_sih_set_type, +}; + +/*----------------------------------------------------------------------*/ + +static inline int sih_read_isr(const struct sih *sih) +{ + int status; + union { + u8 bytes[4]; + u32 word; + } isr; + + /* FIXME need retry-on-error ... */ + + isr.word = 0; + status = twl4030_i2c_read(sih->module, isr.bytes, + sih->mask[irq_line].isr_offset, sih->bytes_ixr); + + return (status < 0) ? status : le32_to_cpu(isr.word); +} + +/* + * Generic handler for SIH interrupts ... we "know" this is called + * in task context, with IRQs enabled. + */ +static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) +{ + struct sih_agent *agent = get_irq_data(irq); + const struct sih *sih = agent->sih; + int isr; + + /* reading ISR acks the IRQs, using clear-on-read mode */ + local_irq_enable(); + isr = sih_read_isr(sih); + local_irq_disable(); + + if (isr < 0) { + pr_err("twl4030: %s SIH, read ISR error %d\n", + sih->name, isr); + /* REVISIT: recover; eventually mask it all, etc */ + return; + } + + while (isr) { + irq = fls(isr); + irq--; + isr &= ~BIT(irq); + + if (irq < sih->bits) + generic_handle_irq(agent->irq_base + irq); + else + pr_err("twl4030: %s SIH, invalid ISR bit %d\n", + sih->name, irq); + } +} + +static unsigned twl4030_irq_next; + +/* returns the first IRQ used by this SIH bank, + * or negative errno + */ +int twl4030_sih_setup(int module) +{ + int sih_mod; + const struct sih *sih = NULL; + struct sih_agent *agent; + int i, irq; + int status = -EINVAL; + unsigned irq_base = twl4030_irq_next; + + /* only support modules with standard clear-on-read for now */ + for (sih_mod = 0, sih = sih_modules; + sih_mod < ARRAY_SIZE(sih_modules); + sih_mod++, sih++) { + if (sih->module == module && sih->set_cor) { + if (!WARN((irq_base + sih->bits) > NR_IRQS, + "irq %d for %s too big\n", + irq_base + sih->bits, + sih->name)) + status = 0; + break; + } + } + if (status < 0) + return status; + + agent = kzalloc(sizeof *agent, GFP_KERNEL); + if (!agent) + return -ENOMEM; + + status = 0; + + agent->irq_base = irq_base; + agent->sih = sih; + agent->imr = ~0; + INIT_WORK(&agent->mask_work, twl4030_sih_do_mask); + INIT_WORK(&agent->edge_work, twl4030_sih_do_edge); + + for (i = 0; i < sih->bits; i++) { + irq = irq_base + i; + + set_irq_chip_and_handler(irq, &twl4030_sih_irq_chip, + handle_edge_irq); + set_irq_chip_data(irq, agent); + activate_irq(irq); + } + + status = irq_base; + twl4030_irq_next += i; + + /* replace generic PIH handler (handle_simple_irq) */ + irq = sih_mod + twl4030_irq_base; + set_irq_data(irq, agent); + set_irq_chained_handler(irq, handle_twl4030_sih); + + pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name, + irq, irq_base, twl4030_irq_next - 1); + + return status; +} + +/* FIXME need a call to reverse twl4030_sih_setup() ... */ + + +/*----------------------------------------------------------------------*/ + +/* FIXME pass in which interrupt line we'll use ... */ +#define twl_irq_line 0 + +int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end) +{ + static struct irq_chip twl4030_irq_chip; + + int status; + int i; + struct task_struct *task; + + /* + * Mask and clear all TWL4030 interrupts since initially we do + * not have any TWL4030 module interrupt handlers present + */ + status = twl4030_init_sih_modules(twl_irq_line); + if (status < 0) + return status; + + wq = create_singlethread_workqueue("twl4030-irqchip"); + if (!wq) { + pr_err("twl4030: workqueue FAIL\n"); + return -ESRCH; + } + + twl4030_irq_base = irq_base; + + /* install an irq handler for each of the SIH modules; + * clone dummy irq_chip since PIH can't *do* anything + */ + twl4030_irq_chip = dummy_irq_chip; + twl4030_irq_chip.name = "twl4030"; + + twl4030_sih_irq_chip.ack = dummy_irq_chip.ack; + + for (i = irq_base; i < irq_end; i++) { + set_irq_chip_and_handler(i, &twl4030_irq_chip, + handle_simple_irq); + activate_irq(i); + } + twl4030_irq_next = i; + pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", "PIH", + irq_num, irq_base, twl4030_irq_next - 1); + + /* ... and the PWR_INT module ... */ + status = twl4030_sih_setup(TWL4030_MODULE_INT); + if (status < 0) { + pr_err("twl4030: sih_setup PWR INT --> %d\n", status); + goto fail; + } + + /* install an irq handler to demultiplex the TWL4030 interrupt */ + task = start_twl4030_irq_thread(irq_num); + if (!task) { + pr_err("twl4030: irq thread FAIL\n"); + status = -ESRCH; + goto fail; + } + + set_irq_data(irq_num, task); + set_irq_chained_handler(irq_num, handle_twl4030_pih); + + return status; + +fail: + for (i = irq_base; i < irq_end; i++) + set_irq_chip_and_handler(i, NULL, NULL); + destroy_workqueue(wq); + wq = NULL; + return status; +} + +int twl_exit_irq(void) +{ + /* FIXME undo twl_init_irq() */ + if (twl4030_irq_base) { + pr_err("twl4030: can't yet clean up IRQs?\n"); + return -ENOSYS; + } + return 0; +} diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c index bf87f675e7fa..0d47fb9e4b3b 100644 --- a/drivers/mfd/wm8350-core.c +++ b/drivers/mfd/wm8350-core.c @@ -183,6 +183,9 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src) (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable) | src[i - reg]; + /* Don't store volatile bits */ + wm8350->reg_cache[i] &= ~wm8350_reg_io_map[i].vol; + src[i - reg] = cpu_to_be16(src[i - reg]); } @@ -1120,6 +1123,7 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int mode) } value = be16_to_cpu(value); value &= wm8350_reg_io_map[i].readable; + value &= ~wm8350_reg_io_map[i].vol; wm8350->reg_cache[i] = value; } else wm8350->reg_cache[i] = reg_map[i]; @@ -1128,7 +1132,6 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int mode) out: return ret; } -EXPORT_SYMBOL_GPL(wm8350_create_cache); /* * Register a client device. This is non-fatal since there is no need to diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 814f49fde530..847481dc8d72 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -246,6 +246,16 @@ config RTC_DRV_TWL92330 platforms. The support is integrated with the rest of the Menelaus driver; it's not separate module. +config RTC_DRV_TWL4030 + tristate "TI TWL4030/TWL5030/TPS659x0" + depends on RTC_CLASS && TWL4030_CORE + help + If you say yes here you get support for the RTC on the + TWL4030 family chips, used mostly with OMAP3 platforms. + + This driver can also be built as a module. If so, the module + will be called rtc-twl4030. + config RTC_DRV_S35390A tristate "Seiko Instruments S-35390A" select BITREVERSE diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index d6a9ac7176ea..e9e8474cc8fe 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -63,6 +63,7 @@ obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o +obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl4030.o obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o diff --git a/drivers/rtc/rtc-twl4030.c b/drivers/rtc/rtc-twl4030.c new file mode 100644 index 000000000000..abe87a4d2665 --- /dev/null +++ b/drivers/rtc/rtc-twl4030.c @@ -0,0 +1,564 @@ +/* + * rtc-twl4030.c -- TWL4030 Real Time Clock interface + * + * Copyright (C) 2007 MontaVista Software, Inc + * Author: Alexandre Rusev <source@mvista.com> + * + * Based on original TI driver twl4030-rtc.c + * Copyright (C) 2006 Texas Instruments, Inc. + * + * Based on rtc-omap.c + * Copyright (C) 2003 MontaVista Software, Inc. + * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> + * Copyright (C) 2006 David Brownell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/types.h> +#include <linux/rtc.h> +#include <linux/bcd.h> +#include <linux/platform_device.h> +#include <linux/interrupt.h> + +#include <linux/i2c/twl4030.h> + + +/* + * RTC block register offsets (use TWL_MODULE_RTC) + */ +#define REG_SECONDS_REG 0x00 +#define REG_MINUTES_REG 0x01 +#define REG_HOURS_REG 0x02 +#define REG_DAYS_REG 0x03 +#define REG_MONTHS_REG 0x04 +#define REG_YEARS_REG 0x05 +#define REG_WEEKS_REG 0x06 + +#define REG_ALARM_SECONDS_REG 0x07 +#define REG_ALARM_MINUTES_REG 0x08 +#define REG_ALARM_HOURS_REG 0x09 +#define REG_ALARM_DAYS_REG 0x0A +#define REG_ALARM_MONTHS_REG 0x0B +#define REG_ALARM_YEARS_REG 0x0C + +#define REG_RTC_CTRL_REG 0x0D +#define REG_RTC_STATUS_REG 0x0E +#define REG_RTC_INTERRUPTS_REG 0x0F + +#define REG_RTC_COMP_LSB_REG 0x10 +#define REG_RTC_COMP_MSB_REG 0x11 + +/* RTC_CTRL_REG bitfields */ +#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 +#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 +#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 +#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08 +#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 +#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20 +#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 + +/* RTC_STATUS_REG bitfields */ +#define BIT_RTC_STATUS_REG_RUN_M 0x02 +#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04 +#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08 +#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10 +#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20 +#define BIT_RTC_STATUS_REG_ALARM_M 0x40 +#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80 + +/* RTC_INTERRUPTS_REG bitfields */ +#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 +#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04 +#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08 + + +/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ +#define ALL_TIME_REGS 6 + +/*----------------------------------------------------------------------*/ + +/* + * Supports 1 byte read from TWL4030 RTC register. + */ +static int twl4030_rtc_read_u8(u8 *data, u8 reg) +{ + int ret; + + ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg); + if (ret < 0) + pr_err("twl4030_rtc: Could not read TWL4030" + "register %X - error %d\n", reg, ret); + return ret; +} + +/* + * Supports 1 byte write to TWL4030 RTC registers. + */ +static int twl4030_rtc_write_u8(u8 data, u8 reg) +{ + int ret; + + ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg); + if (ret < 0) + pr_err("twl4030_rtc: Could not write TWL4030" + "register %X - error %d\n", reg, ret); + return ret; +} + +/* + * Cache the value for timer/alarm interrupts register; this is + * only changed by callers holding rtc ops lock (or resume). + */ +static unsigned char rtc_irq_bits; + +/* + * Enable timer and/or alarm interrupts. + */ +static int set_rtc_irq_bit(unsigned char bit) +{ + unsigned char val; + int ret; + + val = rtc_irq_bits | bit; + ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); + if (ret == 0) + rtc_irq_bits = val; + + return ret; +} + +/* + * Disable timer and/or alarm interrupts. + */ +static int mask_rtc_irq_bit(unsigned char bit) +{ + unsigned char val; + int ret; + + val = rtc_irq_bits & ~bit; + ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); + if (ret == 0) + rtc_irq_bits = val; + + return ret; +} + +static inline int twl4030_rtc_alarm_irq_set_state(int enabled) +{ + int ret; + + if (enabled) + ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); + else + ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); + + return ret; +} + +static inline int twl4030_rtc_irq_set_state(int enabled) +{ + int ret; + + if (enabled) + ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); + else + ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); + + return ret; +} + +/* + * Gets current TWL4030 RTC time and date parameters. + * + * The RTC's time/alarm representation is not what gmtime(3) requires + * Linux to use: + * + * - Months are 1..12 vs Linux 0-11 + * - Years are 0..99 vs Linux 1900..N (we assume 21st century) + */ +static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + unsigned char rtc_data[ALL_TIME_REGS + 1]; + int ret; + u8 save_control; + + ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); + if (ret < 0) + return ret; + + save_control |= BIT_RTC_CTRL_REG_GET_TIME_M; + + ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG); + if (ret < 0) + return ret; + + ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data, + REG_SECONDS_REG, ALL_TIME_REGS); + + if (ret < 0) { + dev_err(dev, "rtc_read_time error %d\n", ret); + return ret; + } + + tm->tm_sec = bcd2bin(rtc_data[0]); + tm->tm_min = bcd2bin(rtc_data[1]); + tm->tm_hour = bcd2bin(rtc_data[2]); + tm->tm_mday = bcd2bin(rtc_data[3]); + tm->tm_mon = bcd2bin(rtc_data[4]) - 1; + tm->tm_year = bcd2bin(rtc_data[5]) + 100; + + return ret; +} + +static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + unsigned char save_control; + unsigned char rtc_data[ALL_TIME_REGS + 1]; + int ret; + + rtc_data[1] = bin2bcd(tm->tm_sec); + rtc_data[2] = bin2bcd(tm->tm_min); + rtc_data[3] = bin2bcd(tm->tm_hour); + rtc_data[4] = bin2bcd(tm->tm_mday); + rtc_data[5] = bin2bcd(tm->tm_mon + 1); + rtc_data[6] = bin2bcd(tm->tm_year - 100); + + /* Stop RTC while updating the TC registers */ + ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); + if (ret < 0) + goto out; + + save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; + twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG); + if (ret < 0) + goto out; + + /* update all the time registers in one shot */ + ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data, + REG_SECONDS_REG, ALL_TIME_REGS); + if (ret < 0) { + dev_err(dev, "rtc_set_time error %d\n", ret); + goto out; + } + + /* Start back RTC */ + save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; + ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG); + +out: + return ret; +} + +/* + * Gets current TWL4030 RTC alarm time. + */ +static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + unsigned char rtc_data[ALL_TIME_REGS + 1]; + int ret; + + ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data, + REG_ALARM_SECONDS_REG, ALL_TIME_REGS); + if (ret < 0) { + dev_err(dev, "rtc_read_alarm error %d\n", ret); + return ret; + } + + /* some of these fields may be wildcard/"match all" */ + alm->time.tm_sec = bcd2bin(rtc_data[0]); + alm->time.tm_min = bcd2bin(rtc_data[1]); + alm->time.tm_hour = bcd2bin(rtc_data[2]); + alm->time.tm_mday = bcd2bin(rtc_data[3]); + alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1; + alm->time.tm_year = bcd2bin(rtc_data[5]) + 100; + + /* report cached alarm enable state */ + if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) + alm->enabled = 1; + + return ret; +} + +static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) +{ + unsigned char alarm_data[ALL_TIME_REGS + 1]; + int ret; + + ret = twl4030_rtc_alarm_irq_set_state(0); + if (ret) + goto out; + + alarm_data[1] = bin2bcd(alm->time.tm_sec); + alarm_data[2] = bin2bcd(alm->time.tm_min); + alarm_data[3] = bin2bcd(alm->time.tm_hour); + alarm_data[4] = bin2bcd(alm->time.tm_mday); + alarm_data[5] = bin2bcd(alm->time.tm_mon + 1); + alarm_data[6] = bin2bcd(alm->time.tm_year - 100); + + /* update all the alarm registers in one shot */ + ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data, + REG_ALARM_SECONDS_REG, ALL_TIME_REGS); + if (ret) { + dev_err(dev, "rtc_set_alarm error %d\n", ret); + goto out; + } + + if (alm->enabled) + ret = twl4030_rtc_alarm_irq_set_state(1); +out: + return ret; +} + +#ifdef CONFIG_RTC_INTF_DEV + +static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd, + unsigned long arg) +{ + switch (cmd) { + case RTC_AIE_OFF: + return twl4030_rtc_alarm_irq_set_state(0); + case RTC_AIE_ON: + return twl4030_rtc_alarm_irq_set_state(1); + case RTC_UIE_OFF: + return twl4030_rtc_irq_set_state(0); + case RTC_UIE_ON: + return twl4030_rtc_irq_set_state(1); + + default: + return -ENOIOCTLCMD; + } +} + +#else +#define omap_rtc_ioctl NULL +#endif + +static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc) +{ + unsigned long events = 0; + int ret = IRQ_NONE; + int res; + u8 rd_reg; + +#ifdef CONFIG_LOCKDEP + /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which + * we don't want and can't tolerate. Although it might be + * friendlier not to borrow this thread context... + */ + local_irq_enable(); +#endif + + res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); + if (res) + goto out; + /* + * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG. + * only one (ALARM or RTC) interrupt source may be enabled + * at time, we also could check our results + * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM] + */ + if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) + events |= RTC_IRQF | RTC_AF; + else + events |= RTC_IRQF | RTC_UF; + + res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M, + REG_RTC_STATUS_REG); + if (res) + goto out; + + /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 + * needs 2 reads to clear the interrupt. One read is done in + * do_twl4030_pwrirq(). Doing the second read, to clear + * the bit. + * + * FIXME the reason PWR_ISR1 needs an extra read is that + * RTC_IF retriggered until we cleared REG_ALARM_M above. + * But re-reading like this is a bad hack; by doing so we + * risk wrongly clearing status for some other IRQ (losing + * the interrupt). Be smarter about handling RTC_UF ... + */ + res = twl4030_i2c_read_u8(TWL4030_MODULE_INT, + &rd_reg, TWL4030_INT_PWR_ISR1); + if (res) + goto out; + + /* Notify RTC core on event */ + rtc_update_irq(rtc, 1, events); + + ret = IRQ_HANDLED; +out: + return ret; +} + +static struct rtc_class_ops twl4030_rtc_ops = { + .ioctl = twl4030_rtc_ioctl, + .read_time = twl4030_rtc_read_time, + .set_time = twl4030_rtc_set_time, + .read_alarm = twl4030_rtc_read_alarm, + .set_alarm = twl4030_rtc_set_alarm, +}; + +/*----------------------------------------------------------------------*/ + +static int __devinit twl4030_rtc_probe(struct platform_device *pdev) +{ + struct rtc_device *rtc; + int ret = 0; + int irq = platform_get_irq(pdev, 0); + u8 rd_reg; + + if (irq < 0) + return irq; + + rtc = rtc_device_register(pdev->name, + &pdev->dev, &twl4030_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc)) { + ret = -EINVAL; + dev_err(&pdev->dev, "can't register RTC device, err %ld\n", + PTR_ERR(rtc)); + goto out0; + + } + + platform_set_drvdata(pdev, rtc); + + ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); + + if (ret < 0) + goto out1; + + if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M) + dev_warn(&pdev->dev, "Power up reset detected.\n"); + + if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) + dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); + + /* Clear RTC Power up reset and pending alarm interrupts */ + ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG); + if (ret < 0) + goto out1; + + ret = request_irq(irq, twl4030_rtc_interrupt, + IRQF_TRIGGER_RISING, + rtc->dev.bus_id, rtc); + if (ret < 0) { + dev_err(&pdev->dev, "IRQ is not free.\n"); + goto out1; + } + + /* Check RTC module status, Enable if it is off */ + ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); + if (ret < 0) + goto out2; + + if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { + dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n"); + rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; + ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); + if (ret < 0) + goto out2; + } + + /* init cached IRQ enable bits */ + ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); + if (ret < 0) + goto out2; + + return ret; + + +out2: + free_irq(irq, rtc); +out1: + rtc_device_unregister(rtc); +out0: + return ret; +} + +/* + * Disable all TWL4030 RTC module interrupts. + * Sets status flag to free. + */ +static int __devexit twl4030_rtc_remove(struct platform_device *pdev) +{ + /* leave rtc running, but disable irqs */ + struct rtc_device *rtc = platform_get_drvdata(pdev); + int irq = platform_get_irq(pdev, 0); + + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); + + free_irq(irq, rtc); + + rtc_device_unregister(rtc); + platform_set_drvdata(pdev, NULL); + return 0; +} + +static void twl4030_rtc_shutdown(struct platform_device *pdev) +{ + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M | + BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); +} + +#ifdef CONFIG_PM + +static unsigned char irqstat; + +static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state) +{ + irqstat = rtc_irq_bits; + + /* REVISIT alarm may need to wake us from sleep */ + mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M | + BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); + return 0; +} + +static int twl4030_rtc_resume(struct platform_device *pdev) +{ + set_rtc_irq_bit(irqstat); + return 0; +} + +#else +#define twl4030_rtc_suspend NULL +#define twl4030_rtc_resume NULL +#endif + +MODULE_ALIAS("platform:twl4030_rtc"); + +static struct platform_driver twl4030rtc_driver = { + .probe = twl4030_rtc_probe, + .remove = __devexit_p(twl4030_rtc_remove), + .shutdown = twl4030_rtc_shutdown, + .suspend = twl4030_rtc_suspend, + .resume = twl4030_rtc_resume, + .driver = { + .owner = THIS_MODULE, + .name = "twl4030_rtc", + }, +}; + +static int __init twl4030_rtc_init(void) +{ + return platform_driver_register(&twl4030rtc_driver); +} +module_init(twl4030_rtc_init); + +static void __exit twl4030_rtc_exit(void) +{ + platform_driver_unregister(&twl4030rtc_driver); +} +module_exit(twl4030_rtc_exit); + +MODULE_AUTHOR("Texas Instruments, MontaVista Software"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h index cdb453162a97..fb604dcd38f1 100644 --- a/include/linux/i2c/twl4030.h +++ b/include/linux/i2c/twl4030.h @@ -228,6 +228,12 @@ struct twl4030_gpio_platform_data { int gpio_base; unsigned irq_base, irq_end; + /* package the two LED signals as output-only GPIOs? */ + bool use_leds; + + /* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */ + u8 mmc_cd; + /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup * should be enabled. Else, if that bit is set in "pulldowns", * that pulldown is enabled. Don't waste power by letting any @@ -277,6 +283,8 @@ struct twl4030_platform_data { /*----------------------------------------------------------------------*/ +int twl4030_sih_setup(int module); + /* * FIXME completely stop using TWL4030_IRQ_BASE ... instead, pass the * IRQ data to subsidiary devices using platform device resources. @@ -291,16 +299,16 @@ struct twl4030_platform_data { #define TWL4030_MODIRQ_BCI (TWL4030_IRQ_BASE + 2) #define TWL4030_MODIRQ_MADC (TWL4030_IRQ_BASE + 3) /* #define TWL4030_MODIRQ_USB (TWL4030_IRQ_BASE + 4) */ -#define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) +/* #define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) */ #define TWL4030_PWRIRQ_PWRBTN (TWL4030_PWR_IRQ_BASE + 0) -#define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) -#define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) -#define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) -#define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) -#define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) -#define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) -#define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) +/* #define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) */ +/* #define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) */ +/* #define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) */ +/* #define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) */ +/* #define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) */ +/* #define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) */ +/* #define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) */ /* Rest are unsued currently*/ @@ -317,17 +325,13 @@ struct twl4030_platform_data { /* TWL4030 GPIO interrupt definitions */ #define TWL4030_GPIO_IRQ_NO(n) (TWL4030_GPIO_IRQ_BASE + (n)) -#define TWL4030_GPIO_IS_ENABLE 1 /* * Exported TWL4030 GPIO APIs * * WARNING -- use standard GPIO and IRQ calls instead; these will vanish. */ -int twl4030_get_gpio_datain(int gpio); -int twl4030_request_gpio(int gpio); int twl4030_set_gpio_debounce(int gpio, int enable); -int twl4030_free_gpio(int gpio); #if defined(CONFIG_TWL4030_BCI_BATTERY) || \ defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) |