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Diffstat (limited to 'Documentation/devicetree/bindings/iio/resolver/ad2s90.txt')
-rw-r--r-- | Documentation/devicetree/bindings/iio/resolver/ad2s90.txt | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/iio/resolver/ad2s90.txt b/Documentation/devicetree/bindings/iio/resolver/ad2s90.txt deleted file mode 100644 index 477d41fa6467..000000000000 --- a/Documentation/devicetree/bindings/iio/resolver/ad2s90.txt +++ /dev/null @@ -1,31 +0,0 @@ -Analog Devices AD2S90 Resolver-to-Digital Converter - -https://www.analog.com/en/products/ad2s90.html - -Required properties: - - compatible: should be "adi,ad2s90" - - reg: SPI chip select number for the device - - spi-max-frequency: set maximum clock frequency, must be 830000 - - spi-cpol and spi-cpha: - Either SPI mode (0,0) or (1,1) must be used, so specify none or both of - spi-cpha, spi-cpol. - -See for more details: - Documentation/devicetree/bindings/spi/spi-bus.txt - -Note about max frequency: - Chip's max frequency, as specified in its datasheet, is 2Mhz. But a 600ns - delay is expected between the application of a logic LO to CS and the - application of SCLK, as also specified. And since the delay is not - implemented in the spi code, to satisfy it, SCLK's period should be at most - 2 * 600ns, so the max frequency should be 1 / (2 * 6e-7), which gives - roughly 830000Hz. - -Example: -resolver@0 { - compatible = "adi,ad2s90"; - reg = <0>; - spi-max-frequency = <830000>; - spi-cpol; - spi-cpha; -}; |