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-rw-r--r--Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml18
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
index d316cc082107..7c25c8d51116 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
@@ -29,6 +29,8 @@ properties:
aspeed,external-nodes:
minItems: 2
maxItems: 2
+ items:
+ maxItems: 1
$ref: /schemas/types.yaml#/definitions/phandle-array
description: |
A cell of phandles to external controller nodes:
@@ -73,6 +75,7 @@ additionalProperties: false
examples:
- |
+ #include <dt-bindings/clock/aspeed-clock.h>
apb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -82,6 +85,8 @@ examples:
syscon: scu@1e6e2000 {
compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1a8>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
pinctrl: pinctrl {
compatible = "aspeed,ast2500-pinctrl";
@@ -102,6 +107,12 @@ examples:
gfx: display@1e6e6000 {
compatible = "aspeed,ast2500-gfx", "syscon";
reg = <0x1e6e6000 0x1000>;
+ reg-io-width = <4>;
+ clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
+ resets = <&syscon ASPEED_RESET_CRT1>;
+ interrupts = <0x19>;
+ syscon = <&syscon>;
+ memory-region = <&gfx_memory>;
};
};
@@ -128,3 +139,10 @@ examples:
};
};
};
+
+ gfx_memory: framebuffer {
+ size = <0x01000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };