diff options
Diffstat (limited to 'arch/arm/boot/dts/mmp2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/mmp2.dtsi | 48 |
1 files changed, 41 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index b6f40743e07b..6a2f072c1d0a 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -117,7 +117,7 @@ mrvl,intc-nr-irqs = <2>; }; - usb_otg_phy0: usb-otg-phy@d4207000 { + usb_phy0: usb-phy@d4207000 { compatible = "marvell,mmp2-usb-phy"; reg = <0xd4207000 0x40>; #phy-cells = <0>; @@ -130,7 +130,7 @@ interrupts = <44>; clocks = <&soc_clocks MMP2_CLK_USB>; clock-names = "USBCLK"; - phys = <&usb_otg_phy0>; + phys = <&usb_phy0>; phy-names = "usb"; status = "disabled"; }; @@ -170,6 +170,28 @@ interrupts = <54>; status = "disabled"; }; + + camera0: camera@d420a000 { + compatible = "marvell,mmp2-ccic"; + reg = <0xd420a000 0x800>; + interrupts = <42>; + clocks = <&soc_clocks MMP2_CLK_CCIC0>; + clock-names = "axi"; + #clock-cells = <0>; + clock-output-names = "mclk"; + status = "disabled"; + }; + + camera1: camera@d420a800 { + compatible = "marvell,mmp2-ccic"; + reg = <0xd420a800 0x800>; + interrupts = <30>; + clocks = <&soc_clocks MMP2_CLK_CCIC1>; + clock-names = "axi"; + #clock-cells = <0>; + clock-output-names = "mclk"; + status = "disabled"; + }; }; apb@d4000000 { /* APB */ @@ -192,6 +214,7 @@ interrupts = <27>; clocks = <&soc_clocks MMP2_CLK_UART0>; resets = <&soc_clocks MMP2_CLK_UART0>; + reg-shift = <2>; status = "disabled"; }; @@ -201,6 +224,7 @@ interrupts = <28>; clocks = <&soc_clocks MMP2_CLK_UART1>; resets = <&soc_clocks MMP2_CLK_UART1>; + reg-shift = <2>; status = "disabled"; }; @@ -210,6 +234,7 @@ interrupts = <24>; clocks = <&soc_clocks MMP2_CLK_UART2>; resets = <&soc_clocks MMP2_CLK_UART2>; + reg-shift = <2>; status = "disabled"; }; @@ -219,6 +244,7 @@ interrupts = <46>; clocks = <&soc_clocks MMP2_CLK_UART3>; resets = <&soc_clocks MMP2_CLK_UART3>; + reg-shift = <2>; status = "disabled"; }; @@ -346,40 +372,48 @@ status = "disabled"; }; - ssp1: ssp@d4035000 { + ssp1: spi@d4035000 { compatible = "marvell,mmp2-ssp"; reg = <0xd4035000 0x1000>; clocks = <&soc_clocks MMP2_CLK_SSP0>; interrupts = <0>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; - ssp2: ssp@d4036000 { + ssp2: spi@d4036000 { compatible = "marvell,mmp2-ssp"; reg = <0xd4036000 0x1000>; clocks = <&soc_clocks MMP2_CLK_SSP1>; interrupts = <1>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; - ssp3: ssp@d4037000 { + ssp3: spi@d4037000 { compatible = "marvell,mmp2-ssp"; reg = <0xd4037000 0x1000>; clocks = <&soc_clocks MMP2_CLK_SSP2>; interrupts = <20>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; - ssp4: ssp@d4039000 { + ssp4: spi@d4039000 { compatible = "marvell,mmp2-ssp"; reg = <0xd4039000 0x1000>; clocks = <&soc_clocks MMP2_CLK_SSP3>; interrupts = <21>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; }; - soc_clocks: clocks{ + soc_clocks: clocks { compatible = "marvell,mmp2-clock"; reg = <0xd4050000 0x1000>, <0xd4282800 0x400>, |