summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/omap5.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/omap5.dtsi')
-rw-r--r--arch/arm/boot/dts/omap5.dtsi28
1 files changed, 15 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 823a59aba286..5c7697726e18 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -126,19 +126,6 @@
};
/*
- * The soc node represents the soc top level view. It is used for IPs
- * that are not memory mapped in the MPU view or for the MPU itself.
- */
- soc {
- compatible = "ti,omap-infra";
- mpu {
- compatible = "ti,omap4-mpu";
- ti,hwmods = "mpu";
- sram = <&ocmcram>;
- };
- };
-
- /*
* XXX: Use a flat representation of the OMAP3 interconnect.
* The real OMAP interconnect network is quite complex.
* Since it will not bring real advantage to represent that in DT for
@@ -167,6 +154,21 @@
l4_per: interconnect@48000000 {
};
+ target-module@48210000 {
+ compatible = "ti,sysc-omap4-simple", "ti,sysc";
+ power-domains = <&prm_mpu>;
+ clocks = <&mpu_clkctrl OMAP5_MPU_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x48210000 0x1f0000>;
+
+ mpu {
+ compatible = "ti,omap4-mpu";
+ sram = <&ocmcram>;
+ };
+ };
+
l4_abe: interconnect@40100000 {
};