diff options
Diffstat (limited to 'arch/arm/boot/dts/r8a7743-sk-rzg1m.dts')
-rw-r--r-- | arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts new file mode 100644 index 000000000000..3a22538208f2 --- /dev/null +++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts @@ -0,0 +1,57 @@ +/* + * Device Tree Source for the SK-RZG1M board + * + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7743.dtsi" + +/ { + model = "SK-RZG1M"; + compatible = "renesas,sk-rzg1m", "renesas,r8a7743"; + + aliases { + serial0 = &scif0; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x40000000>; + }; + + memory@200000000 { + device_type = "memory"; + reg = <2 0x00000000 0 0x40000000>; + }; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; + +&scif0 { + status = "okay"; +}; + +ðer { + phy-handle = <&phy1>; + renesas,ether-link-active-low; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&irqc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + }; +}; |