diff options
Diffstat (limited to 'arch/arm/boot/dts/r8a7791.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 248 |
1 files changed, 113 insertions, 135 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 6439f0569fe2..db67e342c585 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -13,6 +13,7 @@ #include <dt-bindings/clock/r8a7791-clock.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/power/r8a7791-sysc.h> / { compatible = "renesas,r8a7791"; @@ -51,6 +52,7 @@ voltage-tolerance = <1>; /* 1% */ clocks = <&cpg_clocks R8A7791_CLK_Z>; clock-latency = <300000>; /* 300 us */ + power-domains = <&sysc R8A7791_PD_CA15_CPU0>; next-level-cache = <&L2_CA15>; /* kHz - uV - OPPs unknown yet */ @@ -67,6 +69,7 @@ compatible = "arm,cortex-a15"; reg = <1>; clock-frequency = <1500000000>; + power-domains = <&sysc R8A7791_PD_CA15_CPU1>; next-level-cache = <&L2_CA15>; }; }; @@ -92,6 +95,7 @@ L2_CA15: cache-controller@0 { compatible = "cache"; + power-domains = <&sysc R8A7791_PD_CA15_SCU>; cache-unified; cache-level = <2>; }; @@ -118,7 +122,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO0>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; gpio1: gpio@e6051000 { @@ -131,7 +135,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO1>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; gpio2: gpio@e6052000 { @@ -144,7 +148,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO2>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; gpio3: gpio@e6053000 { @@ -157,7 +161,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO3>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; gpio4: gpio@e6054000 { @@ -170,7 +174,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO4>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; gpio5: gpio@e6055000 { @@ -183,7 +187,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO5>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; gpio6: gpio@e6055400 { @@ -196,7 +200,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO6>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; gpio7: gpio@e6055800 { @@ -209,7 +213,7 @@ #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO7>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; thermal: thermal@e61f0000 { @@ -219,7 +223,7 @@ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp5_clks R8A7791_CLK_THERMAL>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #thermal-sensor-cells = <0>; }; @@ -238,7 +242,7 @@ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7791_CLK_CMT0>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; renesas,channels-mask = <0x60>; @@ -258,7 +262,7 @@ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7791_CLK_CMT1>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; renesas,channels-mask = <0xff>; @@ -281,7 +285,7 @@ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R8A7791_CLK_IRQC>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; dmac0: dma-controller@e6700000 { @@ -310,7 +314,7 @@ "ch12", "ch13", "ch14"; clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <15>; }; @@ -341,7 +345,7 @@ "ch12", "ch13", "ch14"; clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <15>; }; @@ -370,7 +374,7 @@ "ch12"; clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <13>; }; @@ -399,7 +403,7 @@ "ch12"; clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>; clock-names = "fck"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <13>; }; @@ -411,7 +415,7 @@ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <2>; }; @@ -423,7 +427,7 @@ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #dma-cells = <1>; dma-channels = <2>; }; @@ -436,7 +440,7 @@ reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_I2C0>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -448,7 +452,7 @@ reg = <0 0xe6518000 0 0x40>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_I2C1>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -460,7 +464,7 @@ reg = <0 0xe6530000 0 0x40>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_I2C2>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -472,7 +476,7 @@ reg = <0 0xe6540000 0 0x40>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_I2C3>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -484,7 +488,7 @@ reg = <0 0xe6520000 0 0x40>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_I2C4>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>; status = "disabled"; }; @@ -497,7 +501,7 @@ reg = <0 0xe6528000 0 0x40>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_I2C5>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <110>; status = "disabled"; }; @@ -512,7 +516,7 @@ clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>; dmas = <&dmac0 0x77>, <&dmac0 0x78>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -525,7 +529,7 @@ clocks = <&mstp3_clks R8A7791_CLK_IIC0>; dmas = <&dmac0 0x61>, <&dmac0 0x62>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -538,7 +542,7 @@ clocks = <&mstp3_clks R8A7791_CLK_IIC1>; dmas = <&dmac0 0x65>, <&dmac0 0x66>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -554,7 +558,7 @@ clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>; dmas = <&dmac0 0xd1>, <&dmac0 0xd2>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; reg-io-width = <4>; status = "disabled"; max-frequency = <97500000>; @@ -567,7 +571,7 @@ clocks = <&mstp3_clks R8A7791_CLK_SDHI0>; dmas = <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -578,7 +582,7 @@ clocks = <&mstp3_clks R8A7791_CLK_SDHI1>; dmas = <&dmac1 0xc1>, <&dmac1 0xc2>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -589,7 +593,7 @@ clocks = <&mstp3_clks R8A7791_CLK_SDHI2>; dmas = <&dmac1 0xd3>, <&dmac1 0xd4>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -602,7 +606,7 @@ clock-names = "fck"; dmas = <&dmac0 0x21>, <&dmac0 0x22>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -615,7 +619,7 @@ clock-names = "fck"; dmas = <&dmac0 0x25>, <&dmac0 0x26>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -628,7 +632,7 @@ clock-names = "fck"; dmas = <&dmac0 0x27>, <&dmac0 0x28>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -641,7 +645,7 @@ clock-names = "fck"; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -654,7 +658,7 @@ clock-names = "fck"; dmas = <&dmac0 0x1f>, <&dmac0 0x20>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -667,7 +671,7 @@ clock-names = "fck"; dmas = <&dmac0 0x23>, <&dmac0 0x24>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -680,7 +684,7 @@ clock-names = "fck"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -693,7 +697,7 @@ clock-names = "fck"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -706,7 +710,7 @@ clock-names = "fck"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -720,7 +724,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x29>, <&dmac0 0x2a>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -734,7 +738,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -748,7 +752,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -762,7 +766,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x2f>, <&dmac0 0x30>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -776,7 +780,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -790,7 +794,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -804,7 +808,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x3a>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -818,7 +822,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -832,7 +836,7 @@ clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -841,7 +845,7 @@ reg = <0 0xee700000 0 0x400>; interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R8A7791_CLK_ETHER>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; phy-mode = "rmii"; #address-cells = <1>; #size-cells = <0>; @@ -854,7 +858,7 @@ reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -865,7 +869,7 @@ reg = <0 0xee300000 0 0x2000>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R8A7791_CLK_SATA0>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -874,7 +878,7 @@ reg = <0 0xee500000 0 0x2000>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R8A7791_CLK_SATA1>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -886,7 +890,7 @@ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, <&usb_dmac1 0>, <&usb_dmac1 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; renesas,buswait = <4>; phys = <&usb0 1>; phy-names = "usb"; @@ -900,7 +904,7 @@ #size-cells = <0>; clocks = <&mstp7_clks R8A7791_CLK_HSUSB>; clock-names = "usbhs"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; usb0: usb-channel@0 { @@ -918,7 +922,7 @@ reg = <0 0xe6ef0000 0 0x1000>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R8A7791_CLK_VIN0>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -927,7 +931,7 @@ reg = <0 0xe6ef1000 0 0x1000>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R8A7791_CLK_VIN1>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -936,7 +940,7 @@ reg = <0 0xe6ef2000 0 0x1000>; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp8_clks R8A7791_CLK_VIN2>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -945,7 +949,7 @@ reg = <0 0xfe928000 0 0x8000>; interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; renesas,has-lut; renesas,has-sru; @@ -959,7 +963,7 @@ reg = <0 0xfe930000 0 0x8000>; interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; renesas,has-lif; renesas,has-lut; @@ -973,7 +977,7 @@ reg = <0 0xfe938000 0 0x8000>; interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; renesas,has-lif; renesas,has-lut; @@ -1013,33 +1017,33 @@ }; can0: can@e6e80000 { - compatible = "renesas,can-r8a7791"; + compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; reg = <0 0xe6e80000 0 0x1000>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_RCAN0>, <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; can1: can@e6e88000 { - compatible = "renesas,can-r8a7791"; + compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; reg = <0 0xe6e88000 0 0x1000>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp9_clks R8A7791_CLK_RCAN1>, <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; jpu: jpeg-codec@fe980000 { - compatible = "renesas,jpu-r8a7791"; + compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu"; reg = <0 0xfe980000 0 0x10300>; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7791_CLK_JPU>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; }; clocks { @@ -1048,12 +1052,11 @@ ranges; /* External root clock */ - extal_clk: extal_clk { + extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overriden by the board. */ clock-frequency = <0>; - clock-output-names = "extal"; }; /* @@ -1064,28 +1067,23 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; - clock-output-names = "audio_clk_a"; }; audio_clk_b: audio_clk_b { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; - clock-output-names = "audio_clk_b"; }; audio_clk_c: audio_clk_c { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; - clock-output-names = "audio_clk_c"; }; /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus_clk { + pcie_bus_clk: pcie_bus { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <100000000>; - clock-output-names = "pcie_bus"; - status = "disabled"; + clock-frequency = <0>; }; /* External SCIF clock */ @@ -1094,15 +1092,13 @@ #clock-cells = <0>; /* This value must be overridden by the board. */ clock-frequency = <0>; - status = "disabled"; }; /* External USB clock - can be overridden by the board */ - usb_extal_clk: usb_extal_clk { + usb_extal_clk: usb_extal { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <48000000>; - clock-output-names = "usb_extal"; }; /* External CAN clock */ @@ -1111,8 +1107,6 @@ #clock-cells = <0>; /* This value must be overridden by the board. */ clock-frequency = <0>; - clock-output-names = "can_clk"; - status = "disabled"; }; /* Special CPG clocks */ @@ -1129,178 +1123,156 @@ }; /* Variable factor clocks */ - sd2_clk: sd2_clk@e6150078 { + sd2_clk: sd2@e6150078 { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe6150078 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd2"; }; - sd3_clk: sd3_clk@e615026c { + sd3_clk: sd3@e615026c { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe615026c 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd3"; }; - mmc0_clk: mmc0_clk@e6150240 { + mmc0_clk: mmc0@e6150240 { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe6150240 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "mmc0"; }; - ssp_clk: ssp_clk@e6150248 { + ssp_clk: ssp@e6150248 { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe6150248 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "ssp"; }; - ssprs_clk: ssprs_clk@e615024c { + ssprs_clk: ssprs@e615024c { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe615024c 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "ssprs"; }; /* Fixed factor clocks */ - pll1_div2_clk: pll1_div2_clk { + pll1_div2_clk: pll1_div2 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <2>; clock-mult = <1>; - clock-output-names = "pll1_div2"; }; - zg_clk: zg_clk { + zg_clk: zg { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <3>; clock-mult = <1>; - clock-output-names = "zg"; }; - zx_clk: zx_clk { + zx_clk: zx { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <3>; clock-mult = <1>; - clock-output-names = "zx"; }; - zs_clk: zs_clk { + zs_clk: zs { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <6>; clock-mult = <1>; - clock-output-names = "zs"; }; - hp_clk: hp_clk { + hp_clk: hp { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <12>; clock-mult = <1>; - clock-output-names = "hp"; }; - i_clk: i_clk { + i_clk: i { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <2>; clock-mult = <1>; - clock-output-names = "i"; }; - b_clk: b_clk { + b_clk: b { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <12>; clock-mult = <1>; - clock-output-names = "b"; }; - p_clk: p_clk { + p_clk: p { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <24>; clock-mult = <1>; - clock-output-names = "p"; }; - cl_clk: cl_clk { + cl_clk: cl { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <48>; clock-mult = <1>; - clock-output-names = "cl"; }; - m2_clk: m2_clk { + m2_clk: m2 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <8>; clock-mult = <1>; - clock-output-names = "m2"; }; - rclk_clk: rclk_clk { + rclk_clk: rclk { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <(48 * 1024)>; clock-mult = <1>; - clock-output-names = "rclk"; }; - oscclk_clk: oscclk_clk { + oscclk_clk: oscclk { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL1>; #clock-cells = <0>; clock-div = <(12 * 1024)>; clock-mult = <1>; - clock-output-names = "oscclk"; }; - zb3_clk: zb3_clk { + zb3_clk: zb3 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL3>; #clock-cells = <0>; clock-div = <4>; clock-mult = <1>; - clock-output-names = "zb3"; }; - zb3d2_clk: zb3d2_clk { + zb3d2_clk: zb3d2 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL3>; #clock-cells = <0>; clock-div = <8>; clock-mult = <1>; - clock-output-names = "zb3d2"; }; - ddr_clk: ddr_clk { + ddr_clk: ddr { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7791_CLK_PLL3>; #clock-cells = <0>; clock-div = <8>; clock-mult = <1>; - clock-output-names = "ddr"; }; - mp_clk: mp_clk { + mp_clk: mp { compatible = "fixed-factor-clock"; clocks = <&pll1_div2_clk>; #clock-cells = <0>; clock-div = <15>; clock-mult = <1>; - clock-output-names = "mp"; }; - cp_clk: cp_clk { + cp_clk: cp { compatible = "fixed-factor-clock"; clocks = <&extal_clk>; #clock-cells = <0>; clock-div = <2>; clock-mult = <1>; - clock-output-names = "cp"; }; /* Gate clocks */ @@ -1495,6 +1467,12 @@ }; }; + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7791-sysc"; + reg = <0 0xe6180000 0 0x0200>; + #power-domain-cells = <1>; + }; + qspi: spi@e6b10000 { compatible = "renesas,qspi-r8a7791", "renesas,qspi"; reg = <0 0xe6b10000 0 0x2c>; @@ -1502,7 +1480,7 @@ clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>; dmas = <&dmac0 0x17>, <&dmac0 0x18>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -1516,7 +1494,7 @@ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; dmas = <&dmac0 0x51>, <&dmac0 0x52>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1529,7 +1507,7 @@ clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; dmas = <&dmac0 0x55>, <&dmac0 0x56>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1542,18 +1520,18 @@ clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; dmas = <&dmac0 0x41>, <&dmac0 0x42>; dma-names = "tx", "rx"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; xhci: usb@ee000000 { - compatible = "renesas,xhci-r8a7791"; + compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci"; reg = <0 0xee000000 0 0xc00>; interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7791_CLK_SSUSB>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; phys = <&usb2 1>; phy-names = "usb"; status = "disabled"; @@ -1566,7 +1544,7 @@ <0 0xee080000 0 0x1100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp7_clks R8A7791_CLK_EHCI>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; bus-range = <0 0>; @@ -1601,7 +1579,7 @@ <0 0xee0c0000 0 0x1100>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp7_clks R8A7791_CLK_EHCI>; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; bus-range = <1 1>; @@ -1651,7 +1629,7 @@ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1754,7 +1732,7 @@ "mix.0", "mix.1", "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; |