summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi196
1 files changed, 0 insertions, 196 deletions
diff --git a/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi b/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
deleted file mode 100644
index 52dba2e39c71..000000000000
--- a/arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * Copyright 2012 ST-Ericsson
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-#include "ste-nomadik-pinctrl.dtsi"
-
-/ {
- soc {
- pinctrl {
- uart0 {
- uart0_default_mux: uart0_mux {
- default_mux {
- function = "u0";
- groups = "u0_a_1";
- };
- };
-
- uart0_default_mode: uart0_default {
- default_cfg1 {
- pins = "GPIO0", "GPIO2";
- ste,config = <&in_pu>;
- };
-
- default_cfg2 {
- pins = "GPIO1", "GPIO3";
- ste,config = <&out_hi>;
- };
- };
-
- uart0_sleep_mode: uart0_sleep {
- sleep_cfg1 {
- pins = "GPIO0", "GPIO2";
- ste,config = <&slpm_in_pu>;
- };
-
- sleep_cfg2 {
- pins = "GPIO1", "GPIO3";
- ste,config = <&slpm_out_hi>;
- };
- };
- };
-
- uart2 {
- uart2_default_mode: uart2_default {
- default_mux {
- function = "u2";
- groups = "u2txrx_a_1";
- };
-
- default_cfg1 {
- pins = "GPIO120";
- ste,config = <&in_pu>;
- };
-
- default_cfg2 {
- pins = "GPIO121";
- ste,config = <&out_hi>;
- };
- };
-
- uart2_sleep_mode: uart2_sleep {
- sleep_cfg1 {
- pins = "GPIO120";
- ste,config = <&slpm_in_pu>;
- };
-
- sleep_cfg2 {
- pins = "GPIO121";
- ste,config = <&slpm_out_hi>;
- };
- };
- };
-
- i2c0 {
- i2c0_default_mux: i2c_mux {
- default_mux {
- function = "i2c0";
- groups = "i2c0_a_1";
- };
- };
-
- i2c0_default_mode: i2c_default {
- default_cfg1 {
- pins = "GPIO147", "GPIO148";
- ste,config = <&in_pu>;
- };
- };
-
- i2c0_sleep_mode: i2c_sleep {
- sleep_cfg1 {
- pins = "GPIO147", "GPIO148";
- ste,config = <&slpm_in_pu>;
- };
- };
- };
-
- i2c1 {
- i2c1_default_mux: i2c_mux {
- default_mux {
- function = "i2c1";
- groups = "i2c1_b_2";
- };
- };
-
- i2c1_default_mode: i2c_default {
- default_cfg1 {
- pins = "GPIO16", "GPIO17";
- ste,config = <&in_pu>;
- };
- };
-
- i2c1_sleep_mode: i2c_sleep {
- sleep_cfg1 {
- pins = "GPIO16", "GPIO17";
- ste,config = <&slpm_in_pu>;
- };
- };
- };
-
- i2c2 {
- i2c2_default_mux: i2c_mux {
- default_mux {
- function = "i2c2";
- groups = "i2c2_b_2";
- };
- };
-
- i2c2_default_mode: i2c_default {
- default_cfg1 {
- pins = "GPIO10", "GPIO11";
- ste,config = <&in_pu>;
- };
- };
-
- i2c2_sleep_mode: i2c_sleep {
- sleep_cfg1 {
- pins = "GPIO11", "GPIO11";
- ste,config = <&slpm_in_pu>;
- };
- };
- };
-
- i2c4 {
- i2c4_default_mux: i2c_mux {
- default_mux {
- function = "i2c4";
- groups = "i2c4_b_2";
- };
- };
-
- i2c4_default_mode: i2c_default {
- default_cfg1 {
- pins = "GPIO122", "GPIO123";
- ste,config = <&in_pu>;
- };
- };
-
- i2c4_sleep_mode: i2c_sleep {
- sleep_cfg1 {
- pins = "GPIO122", "GPIO123";
- ste,config = <&slpm_in_pu>;
- };
- };
- };
-
- i2c5 {
- i2c5_default_mux: i2c_mux {
- default_mux {
- function = "i2c5";
- groups = "i2c5_c_2";
- };
- };
-
- i2c5_default_mode: i2c_default {
- default_cfg1 {
- pins = "GPIO118", "GPIO119";
- ste,config = <&in_pu>;
- };
- };
-
- i2c5_sleep_mode: i2c_sleep {
- sleep_cfg1 {
- pins = "GPIO118", "GPIO119";
- ste,config = <&slpm_in_pu>;
- };
- };
- };
- };
- };
-};