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-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index dcc357b42ae9..1d7fd68bea1d 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -450,12 +450,46 @@
};
};
+ /*
+ * Note we use the address where the mmio registers start, not where
+ * the SRAM blocks start, this cannot be changed because that would be
+ * a devicetree ABI change.
+ */
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ sram@00000000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00000000 0x4000>;
+ allwinner,sram-name = "A1";
+ };
+
+ sram@00004000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00004000 0x4000>;
+ allwinner,sram-name = "A2";
+ };
+
+ sram@00008000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00008000 0x4000>;
+ allwinner,sram-name = "A3-A4";
+ };
+
+ sram@00010000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00010000 0x1000>;
+ allwinner,sram-name = "D";
+ };
+
+ sram-controller@01c00000 {
+ compatible = "allwinner,sun4i-a10-sram-controller";
+ reg = <0x01c00000 0x30>;
+ };
+
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;