diff options
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a23-a33.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a23-a33.dtsi | 88 |
1 files changed, 47 insertions, 41 deletions
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index c16ffcc4db7d..a9c123de5d2c 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -42,8 +42,6 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "skeleton.dtsi" - #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> @@ -51,13 +49,15 @@ / { interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; chosen { #address-cells = <1>; #size-cells = <1>; ranges; - simplefb_lcd: framebuffer@0 { + simplefb_lcd: framebuffer-lcd0 { compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; @@ -118,7 +118,7 @@ }; }; - soc@1c00000 { + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -169,6 +169,8 @@ resets = <&ccu RST_BUS_MMC0>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -298,22 +300,30 @@ #interrupt-cells = <3>; #gpio-cells = <3>; - uart0_pins_a: uart0@0 { - pins = "PF2", "PF4"; - function = "uart0"; + i2c0_pins: i2c0-pins { + pins = "PH2", "PH3"; + function = "i2c0"; }; - uart1_pins_a: uart1@0 { - pins = "PG6", "PG7"; - function = "uart1"; + i2c1_pins: i2c1-pins { + pins = "PH4", "PH5"; + function = "i2c1"; }; - uart1_pins_cts_rts_a: uart1-cts-rts@0 { - pins = "PG8", "PG9"; - function = "uart1"; + i2c2_pins: i2c2-pins { + pins = "PE12", "PE13"; + function = "i2c2"; }; - mmc0_pins_a: mmc0@0 { + lcd_rgb666_pins: lcd-rgb666-pins { + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", + "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", + "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + function = "lcd0"; + }; + + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "mmc0"; @@ -321,7 +331,7 @@ bias-pull-up; }; - mmc1_pins_a: mmc1@0 { + mmc1_pg_pins: mmc1-pg-pins { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "mmc1"; @@ -329,7 +339,7 @@ bias-pull-up; }; - mmc2_8bit_pins: mmc2_8bit { + mmc2_8bit_pins: mmc2-8bit-pins { pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", @@ -370,32 +380,24 @@ bias-pull-up; }; - pwm0_pins: pwm0 { + pwm0_pin: pwm0-pin { pins = "PH0"; function = "pwm0"; }; - i2c0_pins_a: i2c0@0 { - pins = "PH2", "PH3"; - function = "i2c0"; - }; - - i2c1_pins_a: i2c1@0 { - pins = "PH4", "PH5"; - function = "i2c1"; + uart0_pf_pins: uart0-pf-pins { + pins = "PF2", "PF4"; + function = "uart0"; }; - i2c2_pins_a: i2c2@0 { - pins = "PE12", "PE13"; - function = "i2c2"; + uart1_pg_pins: uart1-pg-pins { + pins = "PG6", "PG7"; + function = "uart1"; }; - lcd_rgb666_pins: lcd-rgb666@0 { - pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", - "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", - "PD24", "PD25", "PD26", "PD27"; - function = "lcd0"; + uart1_cts_rts_pg_pins: uart1-cts-rts-pg-pins { + pins = "PG8", "PG9"; + function = "uart1"; }; }; @@ -499,6 +501,8 @@ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C0>; resets = <&ccu RST_BUS_I2C0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -510,6 +514,8 @@ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C1>; resets = <&ccu RST_BUS_I2C1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -521,6 +527,8 @@ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_I2C2>; resets = <&ccu RST_BUS_I2C2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -565,11 +573,11 @@ }; rtc: rtc@1f00000 { - compatible = "allwinner,sun6i-a31-rtc"; - reg = <0x01f00000 0x54>; + compatible = "allwinner,sun8i-a23-rtc"; + reg = <0x01f00000 0x400>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - clock-output-names = "osc32k"; + clock-output-names = "osc32k", "osc32k-out"; clocks = <&ext_osc32k>; #clock-cells = <1>; }; @@ -656,18 +664,16 @@ gpio-controller; interrupt-controller; #interrupt-cells = <3>; - #address-cells = <1>; - #size-cells = <0>; #gpio-cells = <3>; - r_rsb_pins: r_rsb { + r_rsb_pins: r-rsb-pins { pins = "PL0", "PL1"; function = "s_rsb"; drive-strength = <20>; bias-pull-up; }; - r_uart_pins_a: r_uart@0 { + r_uart_pins_a: r-uart-pins { pins = "PL2", "PL3"; function = "s_uart"; }; |