diff options
Diffstat (limited to 'arch/arm/boot/dts/tegra20-seaboard.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-seaboard.dts | 47 |
1 files changed, 26 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 009dafecf88b..ab177b406b78 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -1,6 +1,6 @@ /dts-v1/; -/include/ "tegra20.dtsi" +#include "tegra20.dtsi" / { model = "NVIDIA Seaboard"; @@ -18,7 +18,8 @@ pll-supply = <&hdmi_pll_reg>; nvidia,ddc-i2c-bus = <&hdmi_ddc>; - nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) + GPIO_ACTIVE_HIGH>; }; }; @@ -313,7 +314,7 @@ compatible = "wlf,wm8903"; reg = <0x1a>; interrupt-parent = <&gpio>; - interrupts = <187 0x04>; + interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; @@ -328,14 +329,14 @@ compatible = "isil,isl29018"; reg = <0x44>; interrupt-parent = <&gpio>; - interrupts = <202 0x04>; /* GPIO PZ2 */ + interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>; }; gyrometer@68 { compatible = "invn,mpu3050"; reg = <0x68>; interrupt-parent = <&gpio>; - interrupts = <204 0x04>; /* gpio PZ4 */ + interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -388,7 +389,7 @@ pmic: tps6586x@34 { compatible = "ti,tps6586x"; reg = <0x34>; - interrupts = <0 86 0x4>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; ti,system-power-controller; @@ -511,7 +512,7 @@ compatible = "ak,ak8975"; reg = <0xc>; interrupt-parent = <&gpio>; - interrupts = <109 0x04>; /* gpio PN5 */ + interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -565,7 +566,7 @@ usb@c5000000 { status = "okay"; - nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; dr_mode = "otg"; }; @@ -577,12 +578,14 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) + GPIO_ACTIVE_LOW>; }; usb-phy@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ + nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) + GPIO_ACTIVE_LOW>; }; usb@c5008000 { @@ -595,16 +598,16 @@ sdhci@c8000000 { status = "okay"; - power-gpios = <&gpio 86 0>; /* gpio PK6 */ + power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; bus-width = <4>; keep-power-in-suspend; }; sdhci@c8000400 { status = "okay"; - cd-gpios = <&gpio 69 1>; /* gpio PI5 */ - wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 70 0>; /* gpio PI6 */ + cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; + power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; bus-width = <4>; }; @@ -632,14 +635,14 @@ power { label = "Power"; - gpios = <&gpio 170 1>; /* gpio PV2, active low */ + gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; linux,code = <116>; /* KEY_POWER */ gpio-key,wakeup; }; lid { label = "Lid"; - gpios = <&gpio 23 0>; /* gpio PC7 */ + gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; linux,input-type = <5>; /* EV_SW */ linux,code = <0>; /* SW_LID */ debounce-interval = <1>; @@ -806,7 +809,7 @@ regulator-name = "vdd_1v5"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; - gpio = <&pmic 0 0>; + gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; }; regulator@2 { @@ -815,7 +818,7 @@ regulator-name = "vdd_1v2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - gpio = <&pmic 1 0>; + gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; enable-active-high; }; @@ -847,10 +850,12 @@ nvidia,i2s-controller = <&tegra_i2s1>; nvidia,audio-codec = <&wm8903>; - nvidia,spkr-en-gpios = <&wm8903 2 0>; - nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ + nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; + nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; - clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; + clocks = <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA20_CLK_CDEV1>; clock-names = "pll_a", "pll_a_out0", "mclk"; }; }; |