diff options
Diffstat (limited to 'arch/arm/mach-exynos/common.c')
-rw-r--r-- | arch/arm/mach-exynos/common.c | 65 |
1 files changed, 13 insertions, 52 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 8dd19c696a60..454bc6ed9a8d 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -63,7 +63,7 @@ static void exynos4_map_io(void); static void exynos5_map_io(void); static void exynos4_init_clocks(int xtal); static void exynos5_init_clocks(int xtal); -static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); +static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); static int exynos_init(void); static struct cpu_table cpu_ids[] __initdata = { @@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, .init_clocks = exynos4_init_clocks, - .init_uarts = exynos_init_uarts, + .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4210, }, { @@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, .init_clocks = exynos4_init_clocks, - .init_uarts = exynos_init_uarts, + .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4212, }, { @@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, .init_clocks = exynos4_init_clocks, - .init_uarts = exynos_init_uarts, + .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4412, }, { @@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS5_SOC_MASK, .map_io = exynos5_map_io, .init_clocks = exynos5_init_clocks, - .init_uarts = exynos_init_uarts, .init = exynos_init, .name = name_exynos5250, }, @@ -257,25 +256,10 @@ static struct map_desc exynos5_iodesc[] __initdata = { .length = SZ_64K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_COMBINER_BASE, - .pfn = __phys_to_pfn(EXYNOS5_PA_COMBINER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S3C_VA_UART, .pfn = __phys_to_pfn(EXYNOS5_PA_UART), .length = SZ_512K, .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_CPU, - .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_CPU), - .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_DIST, - .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_DIST), - .length = SZ_4K, - .type = MT_DEVICE, }, }; @@ -354,23 +338,6 @@ static void __init exynos4_map_io(void) static void __init exynos5_map_io(void) { iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); - - s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0); - s3c_device_i2c0.resource[0].end = EXYNOS5_PA_IIC(0) + SZ_4K - 1; - s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC; - s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC; - - s3c_sdhci_setname(0, "exynos4-sdhci"); - s3c_sdhci_setname(1, "exynos4-sdhci"); - s3c_sdhci_setname(2, "exynos4-sdhci"); - s3c_sdhci_setname(3, "exynos4-sdhci"); - - /* The I2C bus controllers are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - s3c_i2c1_setname("s3c2440-i2c"); - s3c_i2c2_setname("s3c2440-i2c"); - - s3c64xx_spi_setname("exynos4210-spi"); } static void __init exynos4_init_clocks(int xtal) @@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base, } #ifdef CONFIG_OF -int __init combiner_of_init(struct device_node *np, struct device_node *parent) +static int __init combiner_of_init(struct device_node *np, + struct device_node *parent) { void __iomem *combiner_base; @@ -729,7 +697,7 @@ static int __init exynos_init(void) /* uart registration process */ -static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) +static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) { struct s3c2410_uartcfg *tcfg = cfg; u32 ucnt; @@ -737,10 +705,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) for (ucnt = 0; ucnt < no; ucnt++, tcfg++) tcfg->has_fracval = 1; - if (soc_is_exynos5250()) - s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no); - else - s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); + s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); } static void __iomem *exynos_eint_base; @@ -972,14 +937,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) struct irq_chip *chip = irq_get_chip(irq); chained_irq_enter(chip, desc); - chip->irq_mask(&desc->irq_data); - - if (chip->irq_ack) - chip->irq_ack(&desc->irq_data); - generic_handle_irq(*irq_data); - - chip->irq_unmask(&desc->irq_data); chained_irq_exit(chip, desc); } @@ -999,11 +957,14 @@ static int __init exynos_init_irq_eint(void) * platforms switch over to using the pinctrl driver, the wakeup * interrupt support code here can be completely removed. */ + static const struct of_device_id exynos_pinctrl_ids[] = { + { .compatible = "samsung,pinctrl-exynos4210", }, + { .compatible = "samsung,pinctrl-exynos4x12", }, + }; struct device_node *pctrl_np, *wkup_np; - const char *pctrl_compat = "samsung,pinctrl-exynos4210"; const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; - for_each_compatible_node(pctrl_np, NULL, pctrl_compat) { + for_each_matching_node(pctrl_np, exynos_pinctrl_ids) { if (of_device_is_available(pctrl_np)) { wkup_np = of_find_compatible_node(pctrl_np, NULL, wkup_compat); |