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-rw-r--r--arch/arm/mach-imx/mm-imx3.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 07699196b461..f8ca96c354f2 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -34,6 +34,8 @@ static void imx3_idle(void)
{
unsigned long reg = 0;
+ mx3_cpu_lp_set(MX3_WAIT);
+
__asm__ __volatile__(
/* disable I and D cache */
"mrc p15, 0, %0, c1, c0, 0\n"
@@ -177,6 +179,10 @@ void __init imx31_soc_init(void)
}
imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
+
+ imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS1_BASE_ADDR));
+ imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS2_BASE_ADDR));
+
platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res,
ARRAY_SIZE(imx31_audmux_res));
}
@@ -267,6 +273,11 @@ void __init imx35_soc_init(void)
}
imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
+
+ /* Setup AIPS registers */
+ imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS1_BASE_ADDR));
+ imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS2_BASE_ADDR));
+
/* i.mx35 has the i.mx31 type audmux */
platform_device_register_simple("imx31-audmux", 0, imx35_audmux_res,
ARRAY_SIZE(imx35_audmux_res));